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473 lines
15 KiB
473 lines
15 KiB
////////////////////////////////////////////////////////////////////////////
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///@copyright Copyright (c) 2017, ´«¿Ø¿Æ¼¼ All rights reserved.
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///-------------------------------------------------------------------------
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/// @file msa300.c
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/// @brief msa300 driver app
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///-------------------------------------------------------------------------
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/// @version 1.0
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/// @author CC
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/// @date 20170122
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/// @note cc_AS_stc01
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//////////////////////////////////////////////////////////////////////////////
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#ifndef _MSA300_H
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#define _MSA300_H
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#include "../clib/bit.h"
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#include "../msp/iic_sim.h"
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/***********************************************************************
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U51(SDO=1) int2 P33 ----------------U10(SDO=0) int2 P32----------------MCU----USB
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0x4c 0x4e
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AS1 AS2
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**************************************************************************/
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#define D_i2c_addr_AS1 0x4c // u51
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//#define D_i2c_addr_AS2 0x4e
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/* Register define for NSA asic */
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#define MSA_REG_SPI_I2C 0x00
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#define MSA_REG_WHO_AM_I 0x01
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#define MSA_REG_ACC_X_LSB 0x02
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#define MSA_REG_ACC_X_MSB 0x03
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#define MSA_REG_ACC_Y_LSB 0x04
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#define MSA_REG_ACC_Y_MSB 0x05
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#define MSA_REG_ACC_Z_LSB 0x06
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#define MSA_REG_ACC_Z_MSB 0x07
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#define MSA_REG_Tape_Active_Status 0x0B
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#define MSA_REG_G_RANGE 0x0f
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#define MSA_REG_ODR_AXIS_DISABLE 0x10
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#define MSA_REG_POWERMODE_BW 0x11
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#define MSA_REG_SWAP_POLARITY 0x12
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#define MSA_REG_FIFO_CTRL 0x14
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#define MSA_REG_INTERRUPT_SETTINGS1 0x16
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#define MSA_REG_INTERRUPT_SETTINGS2 0x17
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#define MSA_REG_INTERRUPT_MAPPING1 0x19
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#define MSA_REG_INTERRUPT_MAPPING2 0x1a
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#define MSA_REG_INTERRUPT_MAPPING3 0x1b
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#define MSA_REG_INT_PIN_CONFIG 0x20
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#define MSA_REG_INT_LATCH 0x21
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#define MSA_REG_ACTIVE_DURATION 0x27
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#define MSA_REG_ACTIVE_THRESHOLD 0x28
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#define MSA_REG_TAP_DURATION 0x2A
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#define MSA_REG_TAP_THRESHOLD 0x2B
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#define MSA_REG_CUSTOM_OFFSET_X 0x38
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#define MSA_REG_CUSTOM_OFFSET_Y 0x39
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#define MSA_REG_CUSTOM_OFFSET_Z 0x3a
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#define MSA_REG_ENGINEERING_MODE 0x7f
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#define MSA_REG_SENSITIVITY_TRIM_X 0x80
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#define MSA_REG_SENSITIVITY_TRIM_Y 0x81
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#define MSA_REG_SENSITIVITY_TRIM_Z 0x82
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#define MSA_REG_COARSE_OFFSET_TRIM_X 0x83
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#define MSA_REG_COARSE_OFFSET_TRIM_Y 0x84
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#define MSA_REG_COARSE_OFFSET_TRIM_Z 0x85
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#define MSA_REG_FINE_OFFSET_TRIM_X 0x86
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#define MSA_REG_FINE_OFFSET_TRIM_Y 0x87
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#define MSA_REG_FINE_OFFSET_TRIM_Z 0x88
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#define MSA_REG_SENS_COMP 0x8c
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#define MSA_REG_MEMS_OPTION 0x8f
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#define MSA_REG_CHIP_INFO 0xc0
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#define MSA_REG_CHIP_INFO_SECOND 0xc1
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#define MSA_REG_SENS_COARSE_TRIM 0xd1
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/*************
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-------------------------------------------------------------------
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Reg 0x0F(Resolution/Range)£ºRead/Write
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Bit7 Bit6 Bit5 Bit4 |Bit3 Bit2 |Bit1 Bit0 | Default
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|RESOLUTION[1:0] | FS[1:0] | 0X00
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RESOLUTION[1:0]: resolution of x/y/z axes,
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00:14bit, 01:12bit, 10:10bit, 11:8bit
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FS[1:0]: acceleration range of x/y/z axes,
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00:+/-2g, 01:+/-4g, 10:+/-8g, 11:+/-16g
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*********/
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#define D_MSA_8BIT B0000_1100
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#define D_MSA_12BIT B0000_0100
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#define D_MSA_10BIT B0000_1000
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#define D_MSA_14BIT B0000_0000
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#define D_MSA_16G B0000_0011
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#define D_MSA_8G B0000_0001
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#define D_MSA_4G B0000_0010
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#define D_MSA_2G B0000_0000
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/**********
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ODR Output data rate 1 1000 Hz
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Reg0x10(ODR) £ºRead/Write Default 0X0F
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Bit7 Bit6 Bit5
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X_AXIS_DIS Y_AXIS_DIS Z_AXIS_DIS
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Bit4
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Bit3 Bit2 Bit1 Bit0
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ODR[3:0]
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X_AXIS_DIS: 0:enable, 1:disable Y_AXIS_DIS: 0:enable, 1:disable Z_AXIS_DIS: 0:enable, 1:disable
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ODR[3:0]:
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0000:1Hz (not available in normal mode)
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0001:1.95Hz (not available in normal mode)
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0010:3.9Hz 0011:7.81Hz
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0100:15.63Hz 0101: 31.25Hz 0110: 62.5Hz 0111: 125Hz 1000: 250Hz
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1001: 500Hz (not available in low power mode)
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1010-1111: (not available in low power mode)
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Table 5: bandwidth under different ODR and BW settings in normal mode
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ODR BW
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1000Hz (1010-1111) 500Hz
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500Hz (1001) 250Hz
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250Hz (1000) 125Hz
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125Hz (0111) 62.5Hz
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62.5Hz (0110) 31.25Hz
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31.25Hz (0101) 15.63Hz
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15.63Hz (0100) 7.81Hz
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7.81Hz (0011) 3.9Hz
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3.9Hz (0010) 1.95Hz
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MSA300 supports four different acceleration measurement ranges, it is selected
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ODR BW
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15.63Hz (0100) 7.81Hz
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*********/
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/// fixme: ʵ²âºÍ¹æ¸ñÊé²»Ò»ÖÂ
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#define D_AXIS_DIS_Y B1000_0000
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#define D_AXIS_DIS_X B0100_0000
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#define D_AXIS_DIS_Z B0010_0000
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#define D_ODR_31Hz25 0x05
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#define D_ODR_250Hz 0x08
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#define D_ODR_125Hz 0x0f
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#define D_ODR_15P63Hz B0000_0100
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/**********
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Reg0x11(Power Mode/Bandwidth) £º Read/Write
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------------------------------------------------------------------
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Bit7 Bit6 |Bit5 Bit4 Bit3 Bit2 Bit1 |Bit0 Default 0X9E
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----------------------------------------------------------------------
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PWR_MODE | LOW_POWER_BW[3:0] |
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--------------------------------------------------------------------
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PWR_MODE: 00:normal mode, 01:low power mode, 10/11 suspend mode
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LOW_POWER_BW[3:0]:
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0000-0010:1.95Hz
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0011:3.9Hz,
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0100:7.81Hz
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0101:15.63Hz,
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0110: 31.25Hz,
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0111: 62.5Hz,
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1000: 125Hz,
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1001: 250Hz,
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1010-1111:500Hz
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***********/
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//#define D_PowerMode_normal 0x00
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//#define D_PowerMode_low 0x40
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//#define D_PowerMode_suspend 0x80
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#define D_lowPower_BW (0x0F<<1)
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#define D_PowerMode_normal 0x1e
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#define D_PowerMode_suspend 0x9e
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#define D_gs_LPBW1H9 (0<<1)
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#define D_gs_LPBW3H9 (3<<1)
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#define D_gs_LPBW7H8 (4<<1)
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#define D_gs_LPBW15H (5<<1)
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#define D_gs_LPBW31H (6<<1)
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#define D_gs_LPBW62H (7<<1)
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#define D_gs_LPBW125H (8<<1)
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#define D_gs_LPBW250H (9<<1)
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#define D_gs_LPBW500H (10<<1)
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///#define D_PowerMode_low 0x5e
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#define D_PowerMode_low (0x50|D_gs_LPBW1H9)
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//#define D_PowerMode_low 0x5e///(0x40|D_gs_LPBW62H)
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#define LD_gsensor_power(Pmode) L2_I2C_WriteCmd(D_i2c_addr_Gsensor,MSA_REG_POWERMODE_BW,Pmode);s_as.power=Pmode
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/**********
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/**************************************
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Reg 0x1B (Int_Map_2) £ºRead/Write
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Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Default
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Bit6 INT2_ORIENT
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Bit5 INT2_S_TAP
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Bit4 INT2_D_TAP
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Bit2 INT2_ACTIVE
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Bit1 RESERVED
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Bit0 INT2_FREEFALL
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0X00
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INT2_ORIENT: map orientation interrupt to INT2, 0:disable, 1:enable INT2_S_TAP: map single tap interrupt to INT2, 0:disable, 1:enable INT2_D_TAP: map double tap interrupt to INT2, 0:disable, 1:enable INT2_ACTIVE: map active interrupt to INT2, 0:disable, 1:enable INT2_FREEFALL: map freefall interrupt to INT2, 0:disable, 1:enable
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***************************************/
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#define D_INT2_ORIENT BITN6
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#define D_INT2_S_TAP BITN5
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#define D_INT2_D_TAP BITN4
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#define D_INT2_ACTIVE BITN2
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#define D_INT2_FREEFALL BITN1
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/**********************************************
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Reg 0x20 (Int_Map_2) £ºRead/Write
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Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Default 0X00
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Bit3 INT2_OD
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Bit2 NT2_LVL
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Bit1 IINT1_OD
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Bit0 INT1_LVL
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INT2_OD: select output for INT2, 0: push-pull, 1:OD
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INT2_LVL: select active level for INT2, 0: low, 1:high
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INT1_OD: select output for INT1, 0: push-pull, 1:OD
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INT1_LVL: select active level for INT1, 0: low, 1:high
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***************************************/
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#define D_INT2_pull 0
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#define D_INT2_OD BITN3
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#define D_INT2_LVL_high BITN2
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#define D_INT2_LVL_low 0
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#define D_INT1_pull 0
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#define D_INT1_OD BITN1
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#define D_INT1_LVL_high BITN0
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#define D_INT1_LVL_low 0
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/*************************************************************
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U51(SDO=1) int2 P33 ----------------U10(SDO=0) int2 P32----------------MCU----USB
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0x4c 0x4e
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AS1 AS2
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--------------------------------------------------------------------
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Reg 0x16(Int_Set_0) £º Read/Write
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Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Default 0X00
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-------------------------------------------------------------------
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ÏóÏÞÓ¦¸Ã ÊÇ ·½Î»Ê¶±ð
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Tap ¹¦ÄÜ
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Ë«»÷ºÍµ¥»÷
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ʹÄܵ¥»÷ s_tap_en ʹÄÜË«»÷d_tap_en
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ÖжÏ״̬±£´æ: £©s_tap_int , d_tap_int
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ͨ¹ý¼ì²é¼ÓËÙ¶ÈбÂÊÊÇ·ñ³¬¹ýÉ趨µÄãÐÖµÀ´ÅжÏÊÇ·ñÓе¥»÷ʼþ
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Bit6 ORIENT_INT_EN
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Bit5 S_TAP_INT_EN
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Bit4 D_TAP_INT_EN
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Bit2 ACTIVE_INT_EN_Z
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Bit1 ACTIVE_INT_EN_Y
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Bit0 ACTIVE_INT_EN_X
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-------------------------------------------------------------------
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ORIENT_INT_EN: orient interrupt, 0:disable, 1:enable
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S_TAP_INT_EN: single tap interrupt, 0:disable, 1:enable
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D_TAP_INT_EN: double tap interrupt, 0:disable, 1:enable
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ACTIVE_INT_EN_Z: active interrupt for the z axis, 0:disable, 1:enable
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ACTIVE_INT_EN_Y: active interrupt for the y axis, 0:disable, 1:enable
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ACTIVE_INT_EN_X: active interrupt for the x axis, 0:disable, 1:enable
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reg 0x16¶ÔÓ¦µÄReg 0x19
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-------------------------------------------------------------------
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Reg 0x19(Int_Map_0) £º Read/Write
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Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Default
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-------------------------------------------------------------------
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INT1_ORIENT
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INT1_S_TAP
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INT1_D_TAP
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INT1_ACTIVE
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INT1_FREEFALL
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0X00
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-------------------------------------------------------------------
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INT1_ORIENT: map orientation interrupt to INT1, 0:disable, 1:enable
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INT1_S_TAP: map single tap interrupt to INT1, 0:disable, 1:enable
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INT1_D_TAP: map double tap interrupt to INT1, 0:disable, 1:enable
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INT1_ACTIVE: map active interrupt to INT1, 0:disable, 1:enable
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INT1_FREEFALL: map freefall interrupt to INT1, 0:disable, 1:enable
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-------------------------------------------------------------------
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Reg 0x27 (Active_Dur) £º Read/Write
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Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Default
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ACTIVE_DUR[1:0] 0X00
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ACTIVE_DUR[1:0]: active duration time is (ACTIVE_DUR[1:0]+1)ms
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-------------------------------------------------------------------
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Reg 0x28(Active_Th) £º Read/Write
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Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Default
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ACTIVE_TH[7:0] 0X14
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ACTIVE_TH[7:0]: threshold of active interrupt
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3.91mg/LSB(2g range)
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7.81mg/LSB(4g range)
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15.625mg/LSB(8g range)
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31.25mg/LSB(16g range)
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**************************************************************************/
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#define ACTIVE_INT_EN_Z BITN2
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#define ACTIVE_INT_EN_Y BITN1
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#define ACTIVE_INT_EN_X BITN0
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/***************************************
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0x21 RESET_INT LATCH_INT[3:0] 0x00
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latch_int Interrupt mode
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0000 non-latched
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0001 temporary latched 250ms
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0010 temporary latched 500ms
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0011 temporary latched 1s
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0100 temporary latched 2s
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0101 temporary latched 4s
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0110 temporary latched 8s
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0111 Latched
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1000 non-latched
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1001 temporary latched 1ms
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1010 temporary latched 1ms
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1011 temporary latched 2ms
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1100 temporary latched 25ms
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1101 temporary latched 50ms
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1110 temporary latched 100ms
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1111 Latched
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_______/``latch period````\_______
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****************************************/
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#define D_no_latched 0x01
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#define D_latch_250ms 0x01
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#define D_latch_500ms 0x02
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#define D_latch_1s 0x03
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#define D_latch_2s 0x04
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#define D_latch_4s 0x05
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#define D_latch_8s 0x06
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#define D_latched 0x07
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#define D_no_latched2 0x08
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#define D_latch_1ms 0x09
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#define D_latch_1ms2 0x0a
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#define D_latch_2ms 0x0B
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#define D_latch_25ms 0x0C
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#define D_latch_50ms 0x0D
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#define D_latch_100ms 0x0E
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#define D_latched2 0x0f
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/****************************************************
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Reg 0x09(Motion_Interrupt) :Read only
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Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Default 0X00
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Bit6 ORIENT_INT
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Bit5 S_TAP_INT
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Bit4 D_TAP_INT
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Bit2 ACTIVE_INT
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Bit0 FREEFALL_INT
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ÔËÊäµÄʱºò²»Í£µÄ¶¯Ôõô°ì ÐèÒª·½Î»Åж¨£¿£¿
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Èç¹ûͼÏñ²»ÊǺڰµÖÐ Ôò
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ÔËÊäµÄ¶¯¾²´ó ÐèÒª¹Ø±Õ
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Ò²¾ÍÊÇÓдóµÄ¶¯¾²Ê±ÐèÒª5sÒÔÉÏÖ®ºóÔÙ¹¤×÷ Èç¹û¶¯¾²´ó ÔÙÐÝÏ¢5Ãë ÕâÑù°ÑºÄµç
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½µµ½×îС
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ORIENT_INT: orientation interrupt status,0:inactive,1:active
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S_TAP_INT: single tap interrupt status,0:inactive,1:active
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D_TAP_INT: double tap interrupt status,0:inactive,1:active
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ACTIVE_INT: active interrupt status,0:inactive,1:active
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FREEFALL_INT: freefall interrupt status,0:inactive,1:active
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-------------------------------------------------------------------
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Reg 0x0B(Tape_Active_Status) :Read only
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Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Default
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TAP_SIGN
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TAP_FIRST_X
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TAP_FIRST_Y
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TAP_FIRST_Z
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ACTIVE_SIGN
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ACTIVE_FIRST_X
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ACTIVE_FIRST_Y
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ACTIVE_FIRST_Z
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0X00
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-------------------------------------------------------------------
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TAP_SIGN: sign of tap triggering signal, 0:positive,1:negative
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TAP_FIRST_X: tap interrupt triggered by x axis, 1:positive,0:negative
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TAP_FIRST_Y: tap interrupt triggered by y axis, 1:positive,0:negative
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TAP_FIRST_Z: tap interrupt triggered by z axis, 1:positive,0:negative
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ACTIVE_SIGN: sign of active interrupt, 0:positive,1:negative
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ACTIVE_FIRST_X: active interrupt triggered by x axis, 1:positive,0:negative
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ACTIVE_FIRST_Y: active interrupt triggered by y axis, 1:positive,0:negative
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ACTIVE_FIRST_Z: active interrupt triggered by z axis, 1:positive,0:negative
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***************************************************/
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#define INT1_S_TAP_INT BITN5 ///µ¥»÷ÖжÏ
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#define INT1_D_TAP_INT BITN4 ///Ë«»÷ÖжÏ
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#define INT1_ACTIVE BITN2 /// Õñ¶¯ÖжÏ
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#define D_Active_TH 0x28
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#define D_Active_Dur 0x27
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#define D_i2c_addr_AS1 0x4c // u51
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#define D_i2c_addr_AS2 0x4e
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#define D_i2c_addr_Gsensor 0x4c // u51
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#define D_i2c_addr_AS1 0x4c // u51
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#define D_i2c_addr_AS2 0x4e
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/******************************************************************************/
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/***************************** Include Files **********************************/
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/******************************************************************************/
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// ×î¸ß400Khz 1/400 ms 2.5us
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//Symbol Parameter Condition Min Max Unit
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//fscl Clock frequency 400 kHz
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#define D_as_ch_mun 1
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struct _s_gsens_
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{//8byte
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U8 d[6];
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// U8 reg_action;
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U8 power;
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// U8 reg_temp;
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// U8 action_ok;
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// U16 x;
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// U16 y;
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// U16 z;
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};
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extern struct _s_gsens_ s_as;
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extern void L1_as_readXYZ(unsigned char CH);
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extern void L1_msa300_init(void);
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extern void L3_msa300_fun(U8 *pPara);
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extern void L1_as_action(void);
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extern void L1_as_WorkStatus(unsigned char d);
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///L1_msa300_power(D_sleep);
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extern void L1_msa300_power(U8 mode);
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#define L1_ms300_reg_set(x,y) L2_I2C_WriteCmd(D_i2c_addr_Gsensor, (x),(y) )
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#define L1_ms300_reg_get(x,y) L2_I2C_ReadReg(D_i2c_addr_Gsensor,(x),1)
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#define DL_ms300_int_open(); L1_ms300_reg_set(MSA_REG_INTERRUPT_MAPPING3,D_INT2_S_TAP|D_INT2_ACTIVE);
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#define DL_ms300_int_close(); L1_ms300_reg_set(MSA_REG_INTERRUPT_MAPPING3,0);
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#endif // #ifndef _MSA300_H
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