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1177 lines
30 KiB
1177 lines
30 KiB
#include "MAX30102.h"
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#include "debug_drv.h"
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#define D_task_m32_01 0x20
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#define D_task_m32_HR 0x31
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#define D_task_m32_SPO 0x32
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#define D_task_m32_sample 0x34
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#define D_task_m32_cal 0x35
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#define D_task_m32_out 0x25
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#define D_task_m32_ask 0x24
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#define D_task_m32_read 0x28
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////>>>>>>>>>>>>>>>>>>>>>_s_task_m32_>>>>>>>>>>>>>>>>>>>>>>
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TS_task_m32_ ts_task_m32;
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TS_max30102_ ts_max30102;
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/// ts_max30102.d[6];
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uint8 Max30102_reset(void)
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{
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#if 0
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if(L1_max30102_WB(REG_MODE_CONFIG, 0x40))
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return 1;
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else
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return 0;
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#else
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L1_max30102_WB(REG_MODE_CONFIG, 0x40);
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return 1;
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#endif
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}
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/****
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SPO2_ADC_RGE[1:0] LSB SIZE (pA) FULL SCALE (nA)
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00 7.81 2048
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01 15.63 4096
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10 31.25 8192
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11 62.5 16384
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LED_PW[1:0] PULSE WIDTH (µs) ADC RESOLUTION (bits)
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00 69 (68.95) 15
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01 118 (117.78) 16
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10 215 (215.44) 17
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11 411 (410.75) 18
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27
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0010 0111
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0 01 0 01 11
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*********/
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#define D_LED_PW_16BITS 0X01
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#define D_LED_PW_18BITS 0X03
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#define D_SPO2_SR_50pS (0X00<<2) ///SAMPLE RATE
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#define D_SPO2_SR_100pS (0X01<<2) ///SAMPLE RATE
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#define D_SPO2_SR_200pS (0X02<<2) ///SAMPLE RATE
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#define D_SPO2_SR_400pS (0X03<<2) ///SAMPLE RATE
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#define SPO2_ADC_RGE_2048 (0X00<<5)
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#define SPO2_ADC_RGE_4096 (0X01<<5)
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#define SPO2_ADC_RGE_8192 (0X02<<5)
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/*********
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REGISTER FIFO Configuration
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B7 B6 B5 B4 B3 B2 B1 B0 REG ADDR POR STATE
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SMP_AVE[2:0] FIFO_ROL LOVER_EN FIFO_A_FULL[3:0] 0x08 0x00 R/W
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****/
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void L0_MAX30102_mode(u8 mode)
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{
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if(D_m32_mode_SPO2 == mode)
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{
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/// 20220913_82240 CCmodify L1_max30102_WB(REG_FIFO_CONFIG,0x0f);//sample avg = 1, fifo rollover=false, fifo almost full = 17
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L1_max30102_WB(REG_FIFO_CONFIG,0x00);//sample avg = 1, fifo rollover=false, fifo almost full = 0
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////需要配置成中断的时候获取 在定时器中读取标志位作为fifo ok的判断
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L1_max30102_WB(REG_MODE_CONFIG, D_m32_mode_SPO2);//0x02 for Red only, 0x03 for SpO2 mode 0x07 multimode LED
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////27
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L1_max30102_WB(REG_SPO2_CONFIG,SPO2_ADC_RGE_8192|D_SPO2_SR_50pS|D_LED_PW_18BITS); // SPO2_ADC range = 4096nA, SPO2 sample rate (100 Hz), 18bits LED pulseWidth (400uS)
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/// L1_max30102_WB(REG_SPO2_CONFIG,0x27); // SPO2_ADC range = 4096nA, SPO2 sample rate (100 Hz), 18bits LED pulseWidth (400uS)
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L1_max30102_WB(REG_LED1_PA,0x32);//Choose value for ~ 10mA for LED1
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L1_max30102_WB(REG_LED2_PA,0x32);// Choose value for ~ 10mA for LED2
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L1_max30102_WB(REG_PILOT_PA,0x7f);// Choose value for ~ 25mA for Pilot LED
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}else
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{
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/// 20220913_82240 CCmodify L1_max30102_WB(REG_FIFO_CONFIG,0x0f);//sample avg = 1, fifo rollover=false, fifo almost full = 17
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L1_max30102_WB(REG_FIFO_CONFIG,0x00);//sample avg = 1, fifo rollover=false, fifo almost full = 0
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////需要配置成中断的时候获取 在定时器中读取标志位作为fifo ok的判断
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L1_max30102_WB(REG_MODE_CONFIG, D_m32_mode_HR);//0x02 for Red only, 0x03 for SpO2 mode 0x07 multimode LED
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L1_max30102_WB(REG_SPO2_CONFIG,SPO2_ADC_RGE_8192|D_SPO2_SR_400pS|D_LED_PW_18BITS); // SPO2_ADC range = 4096nA, SPO2 sample rate (100 Hz), 18bits LED pulseWidth (400uS)
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L1_max30102_WB(REG_LED1_PA,0x10);//Choose value for ~ 10mA for LED1
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L1_max30102_WB(REG_LED2_PA,0x10);// Choose value for ~ 10mA for LED2
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L1_max30102_WB(REG_PILOT_PA,0x01);// Choose value for ~ 25mA for Pilot LED
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}
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}
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void L1_MAX30102_Config(void)
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{
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L1_max30102_WB(REG_MODE_CONFIG, 0x40);///reset = 1;
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Lc_delay_ms(30);
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// L1_max30102_WB(REG_INTR_ENABLE_1,0xc0);//// INTR setting 1100 A_FULL_EN PPG_RDY_EN
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// L1_max30102_WB(REG_INTR_ENABLE_2,0x00);//
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L1_max30102_WB(REG_INTR_ENABLE_1,0x80);//// INTR setting 1100 A_FULL_EN PPG_RDY_EN
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L1_max30102_WB(REG_INTR_ENABLE_2,0x00);//
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L0_MAX30102_mode(D_m32_mode_HR);
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L1_max30102_WB(REG_FIFO_WR_PTR,0x00);//FIFO_WR_PTR[4:0]
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L1_max30102_WB(REG_OVF_COUNTER,0x00);//OVF_COUNTER[4:0]
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L1_max30102_WB(REG_FIFO_RD_PTR,0x00);//FIFO_RD_PTR[4:0]
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}
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#define D_max3_sp 3
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#define D_max3_figer 868236L
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#define D_max3_NoFiger 6000L
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void L2_max30102_init(void)
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{
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L2_task_m32_register();
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L0_IICMx_INIT(D_iicch_max13102,1);
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ts_iicm.t0[D_iicch_max13102]= 0;///模拟iic的时候低电平和高电平的时间经常不确定
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ts_iicm.t1[D_iicch_max13102]= 1;///使用iic前需要配置iic的速率 根据规格书的要求
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ts_max30102.fifook = 0;
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ts_max30102.havefigle = 0;
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ts_max30102.datok = 0;
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ts_max30102.sum = D_max3_figer << D_max3_sp;;
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ts_max30102.sum2 = D_max3_figer << D_max3_sp;
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}
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void L3_max_spo2(void)
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{
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if(ts_max30102.i >= 64)
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{//39数据为1周期
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ts_max30102.i = 0;
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ts_max30102.havefigle = 0;
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//取得周期内最大最小数据
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ts_max30102.ac=ts_max30102.IR_max-ts_max30102.IR_min; //单个周期内最大最小数据差为交流分量
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ts_max30102.dc=ts_max30102.IR_min; //数据=直流分量+交流分量
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ts_max30102.ac2=ts_max30102.RED_max-ts_max30102.RED_min;//同理
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ts_max30102.dc2=ts_max30102.RED_min;
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ts_max30102.ac_ir=(float)ts_max30102.ac;//注意转换，否则无法赋值
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ts_max30102.dc_ir=(float)ts_max30102.dc;
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ts_max30102.ac_red=(float)ts_max30102.ac2;
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ts_max30102.dc_red=(float)ts_max30102.dc2;
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ts_max30102.R2=(ts_max30102.ac_red* ts_max30102.dc_ir)/(ts_max30102.ac_ir*ts_max30102.dc_red);
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ts_max30102.SPO2 =-45.060*ts_max30102.R2*ts_max30102.R2+ 30.354 *ts_max30102.R2 + 94.845;
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ts_max30102.u16d =(U16)ts_max30102.SPO2;
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ts_max30102.SPO2_out =(U8)ts_max30102.u16d;
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/// printf(" SPO2 = %2.2f (%d) ",ts_max30102.SPO2,(int)ts_max30102.SPO2_out);
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ts_max30102.SPO2_ok = 1;
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///printf(" %lu--%lu ",ts_max30102.IR_min,ts_max30102.IR_max);
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///printf(" %lu--%lu ",ts_max30102.RED_min,ts_max30102.RED_max);
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ts_max30102.IR_max=ts_max30102.IR_out2;
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ts_max30102.IR_min=ts_max30102.IR_out2;
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ts_max30102.RED_max=ts_max30102.RED_out2;
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ts_max30102.RED_min=ts_max30102.RED_out2;
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}
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}
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///进行简单的分析
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void L2_max30102_hh(void)
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{
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////>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>shift average
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ts_max30102.sum += ts_max30102.red;
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ts_max30102.sum -= ts_max30102.RED_out2;
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ts_max30102.RED_out2 = ts_max30102.sum >> D_max3_sp;
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// 0 red,red_out2
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/// 0 -red_out2 +red
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///<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<shift average
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ts_max30102.sum2 += ts_max30102.ir;
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ts_max30102.sum2 -= ts_max30102.IR_out2;
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ts_max30102.IR_out2 = ts_max30102.sum2 >> D_max3_sp;
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/// printf(" H %lu %lu f%d ",ts_max30102.RED_out2,ts_max30102.IR_out2,(int)ts_max30102.havefigle);
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if(0 == ts_max30102.havefigle)
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{
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if((ts_max30102.IR_out2 +ts_max30102.RED_out2) > D_max3_figer)
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{
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//// printf("\r\n have figle ");
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ts_max30102.havefigle = 1;
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ts_max30102.i=0;
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ts_max30102.IR_max=ts_max30102.IR_out2;
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ts_max30102.IR_min=ts_max30102.IR_out2;
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ts_max30102.RED_max=ts_max30102.RED_out2;
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ts_max30102.RED_min=ts_max30102.RED_out2;
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}else
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{
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/// printf(" clear figle \r\n");///需要显示清零
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ts_max30102.havefigle = 0;
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ts_max30102.i = 0;
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ts_max30102.hr_out = 1;
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ts_max30102.hr_out2 = 0;
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ts_max30102.hr_out2_temp = ts_max30102.hr_out2+1;
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ts_max30102.hr_ok = 1;
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ts_max30102.SPO2 = 0;
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ts_max30102.SPO2_out = 0;
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ts_max30102.SPO2_ok = 1;
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ts_max30102.SPO2_out_temp = ts_max30102.SPO2_ok+ 1;
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}
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}else
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{///have figle
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ts_max30102.havefigle++;
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if (ts_max30102.havefigle > 16)///过滤掉最开始的几个数据
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{ts_max30102.havefigle = 16;
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ts_max30102.cashe[2] = ts_max30102.cashe[1];
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ts_max30102.cashe[1] = ts_max30102.cashe[0];
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ts_max30102.cashe[0] = ts_max30102.RED_out2;
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if((ts_max30102.cashe[1] >= ts_max30102.cashe[2])&&(ts_max30102.cashe[1] > ts_max30102.cashe[0]))
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{///求波峰
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ts_max30102.hr_s = ts_max30102.hr_i;
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ts_max30102.hr_s *= 20L;///20ms 间隔的周期 200hz采样决定的
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ts_max30102.hr = 60000L/ts_max30102.hr_s;
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ts_max30102.u16d = (U16)ts_max30102.hr;
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ts_max30102.hr_out = (U8)ts_max30102.u16d;
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//// printf( "hr = %d ",(int)ts_max30102.hr_out);
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if((ts_max30102.hr_out >= 100) ||(ts_max30102.hr_out <= 50)) //缓存套路
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{
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ts_max30102.hr_out = ts_max30102.hr_out2;
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}else
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{
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ts_max30102.hr_out2 = ts_max30102.hr_out;
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}
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//// printf( "hr_out2 = %d ",(int)ts_max30102.hr_out2);
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ts_max30102.hr_ok = 1;
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ts_max30102.hr_i = 0;
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}
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else
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{
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ts_max30102.hr_i ++;
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}
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/// printf(" i=%lu ",ts_max30102.i);
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if(ts_max30102.RED_max < ts_max30102.RED_out2){ ts_max30102.RED_max=ts_max30102.RED_out2; }
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if(ts_max30102.RED_min > ts_max30102.RED_out2){ ts_max30102.RED_min=ts_max30102.RED_out2; }
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//printf(" %lu--%lu ",ts_max30102.RED_min,ts_max30102.RED_max);
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if(ts_max30102.IR_max < ts_max30102.IR_out2){ ts_max30102.IR_max=ts_max30102.IR_out2; }
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if(ts_max30102.IR_min > ts_max30102.IR_out2){ ts_max30102.IR_min=ts_max30102.IR_out2; }
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//printf(" %lu--%lu ",ts_max30102.IR_min,ts_max30102.IR_max);
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ts_max30102.i++;//记录周期数
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L3_max_spo2();
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}
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}
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}
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#if 0
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void L2_timer4max30102_callback(void)
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{
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max30102_read_fifo();//数据读入
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}
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void max30102_read_fifo(void)
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{
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U8 i;
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ts_max30102.s = IIC_Read_Byte(MAX30102_Device_address,REG_FIFO_WR_PTR);
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///L1_uartD_senduc('W');
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///L1_uartD_senduchex(ts_max30102.s);
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if(ts_max30102.s > 0x1e)
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{///L1_uartD_senduc('r');
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ts_max30102.fifook = 1;
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}
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if(ts_max30102.fifook)
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{////ts_max30102.s
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ts_max30102.fifook = 0;
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L1_max30102_WB(REG_FIFO_WR_PTR,0x00);//FIFO_WR_PTR[4:0]
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L1_max30102_WB(REG_OVF_COUNTER,0x00);//OVF_COUNTER[4:0]
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L1_max30102_WB(REG_FIFO_RD_PTR,0x00);//FIFO_RD_PTR[4:0]
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for(i = 0;i < 32;i ++)
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{
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L1_max30102_Read_Array(REG_FIFO_DATA,(u8 *)&ts_max30102.dfifo[i],6);
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if (ts_max30102.mode == D_m32_mode_SPO2)
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{
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if(i ==0x1f)
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{
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ts_max30102.dfifo[i].RED0 = ts_max30102.dfifo[i-1].RED0 ;
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ts_max30102.dfifo[i].RED1 = ts_max30102.dfifo[i-1].RED1 ;
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ts_max30102.dfifo[i].RED2 = ts_max30102.dfifo[i-1].RED2 ;
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ts_max30102.dfifo[i].IR0 = ts_max30102.dfifo[i-1].IR0 ;
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ts_max30102.dfifo[i].IR1 = ts_max30102.dfifo[i-1].IR1 ;
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ts_max30102.dfifo[i].IR2 = ts_max30102.dfifo[i-1].IR2 ;
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/// L1_uartD_senduchex(i); L1_uartD_senduc('f');L1_uartD_senduc(' ');
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}else
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{
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// L1_uartD_senduchex(i); L1_uartD_senduc(' ');
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}
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}else
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{
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/// L1_uartD_senduchex(i); L1_uartD_senduc(' ');
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}
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ts_max30102.u16b = ts_max30102.dfifo[i].RED2;
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ts_max30102.red =(U32)ts_max30102.u16b;
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ts_max30102.red <<= 16 ;
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ts_max30102.u16d = ts_max30102.dfifo[i].RED1;
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ts_max30102.u16d <<= 8;
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ts_max30102.u16d |= ts_max30102.dfifo[i].RED0;
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ts_max30102.red |= (U32)ts_max30102.u16d;
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//////////////////////
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ts_max30102.u16b = ts_max30102.dfifo[i].IR2;
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ts_max30102.ir =(U32)ts_max30102.u16b;
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ts_max30102.ir <<= 16 ;
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ts_max30102.u16d = ts_max30102.dfifo[i].IR1;
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ts_max30102.u16d <<= 8;
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ts_max30102.u16d |= ts_max30102.dfifo[i].IR0;
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ts_max30102.ir |= (U32)ts_max30102.u16d;
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//printf("\r\n %lu %lu ",ts_max30102.red,ts_max30102.ir);
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/// ts_max30102.datok = 1;
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L2_max30102_hh();
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}
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}
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}
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#endif
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void L2_task_m32_register(void)
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{
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L1_task_reg_clear(&ts_task_m32.task);
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L3_task_s_go(ts_task_m32,D_task_init);
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}
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///step 1 init
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///step 2 启动hr模式
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///step 3 等待采样完成
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///step 4 启动spo模式
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///step 5 等待采样完成
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///step 6
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///L2_task_m32_handle(&ts_task_m32);
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void L2_task_m32_handle(TS_task_m32_ *s)
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{
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unsigned char i = 0;
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TTSS_Task_init():
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ts_max30102.HRok = 0;
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printf("\r\nL2_task_m32_handle ");
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L2_task_go(D_task_m32_HR);
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TTSS_Task_step(D_task_m32_HR):
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L1_MAX30102_Config();
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ts_max30102.mode = D_m32_mode_SPO2;
|
|
///ts_max30102.mode = D_m32_mode_HR;
|
|
printf("\r\nD_m32_mode_SPO2 ");
|
|
///printf("\r\nD_m32_mode_HR ");
|
|
L0_MAX30102_mode(ts_max30102.mode);
|
|
|
|
ts_max30102.s = IIC_Read_Byte(MAX30102_Device_address,REG_FIFO_WR_PTR);
|
|
printf("REG_FIFO_WR_PTR = %d \r\n",(int)ts_max30102.s);
|
|
ts_max30102.s2 = ts_max30102.s +1;
|
|
ts_max30102.fifo_ok = 0;
|
|
L2_task_go(D_task_m32_ask);
|
|
TTSS_Task_step(D_task_m32_ask):
|
|
/// ts_max30102.s = IIC_Read_Byte(MAX30102_Device_address,REG_INTR_STATUS_1);
|
|
/// printf("S%d ",(int)ts_max30102.s);///
|
|
|
|
ts_max30102.s = IIC_Read_Byte(MAX30102_Device_address,REG_FIFO_WR_PTR);
|
|
|
|
|
|
/// printf("S%d ",(int)ts_max30102.s);///
|
|
if(ts_max30102.s == 0)
|
|
{
|
|
printf(" Z%d ",(int)ts_max30102.s);
|
|
|
|
L1_max30102_WB(REG_FIFO_WR_PTR,0x00);//FIFO_WR_PTR[4:0]
|
|
L1_max30102_WB(REG_OVF_COUNTER,0x00);//OVF_COUNTER[4:0]
|
|
L1_max30102_WB(REG_FIFO_RD_PTR,0x00);//FIFO_RD_PTR[4:0]
|
|
L2_task_go(D_task_m32_HR);
|
|
}else if(ts_max30102.s >31 )
|
|
{
|
|
|
|
L1_max30102_WB(REG_FIFO_WR_PTR,0x00);//FIFO_WR_PTR[4:0]
|
|
L1_max30102_WB(REG_OVF_COUNTER,0x00);//OVF_COUNTER[4:0]
|
|
L1_max30102_WB(REG_FIFO_RD_PTR,0x00);//FIFO_RD_PTR[4:0]
|
|
printf(" E%d ",(int)ts_max30102.s);
|
|
L2_task_go(D_task_m32_HR);
|
|
}else
|
|
{
|
|
if(ts_max30102.s2 != ts_max30102.s)
|
|
{
|
|
ts_max30102.s2 = ts_max30102.s;
|
|
////printf("\r\n%d ",(int)ts_max30102.s);
|
|
if(ts_max30102.s == 31)
|
|
{///printf("\r\n %d ",(int)ts_max30102.s);
|
|
/// printf("\r\nFull:");
|
|
L2_task_go(D_task_m32_read);
|
|
}else
|
|
{
|
|
/// L1_uartD_senduc('&');
|
|
}
|
|
}
|
|
}
|
|
TTSS_Task_step(D_task_m32_read):
|
|
|
|
L1_max30102_WB(REG_FIFO_WR_PTR,0x00);//FIFO_WR_PTR[4:0]
|
|
L1_max30102_WB(REG_OVF_COUNTER,0x00);//OVF_COUNTER[4:0]
|
|
L1_max30102_WB(REG_FIFO_RD_PTR,0x00);//FIFO_RD_PTR[4:0]
|
|
for(i = 0;i < 32;i ++)
|
|
{
|
|
L1_max30102_Read_Array(REG_FIFO_DATA,(u8 *)&ts_max30102.dfifo[i],6);
|
|
/// L1_uartD_0d0a();
|
|
/// L1_uartD_uc(' ');L1_uartD_Arrayhex((u8 *)&ts_max30102.dfifo[i],6);
|
|
// L1_uartD_uc(' ');L1_uartD_uchex(i);
|
|
|
|
if (ts_max30102.mode == D_m32_mode_SPO2)
|
|
{
|
|
if(i ==0x1f)///31
|
|
{
|
|
|
|
ts_max30102.dfifo[i].RED0 = ts_max30102.dfifo[i-1].RED0 ;
|
|
ts_max30102.dfifo[i].RED1 = ts_max30102.dfifo[i-1].RED1 ;
|
|
ts_max30102.dfifo[i].RED2 = ts_max30102.dfifo[i-1].RED2 ;
|
|
ts_max30102.dfifo[i].IR0 = ts_max30102.dfifo[i-1].IR0 ;
|
|
ts_max30102.dfifo[i].IR1 = ts_max30102.dfifo[i-1].IR1 ;
|
|
ts_max30102.dfifo[i].IR2 = ts_max30102.dfifo[i-1].IR2 ;
|
|
|
|
/**/
|
|
///L1_uartD_senduchex(i); L1_uartD_senduc('f');L1_uartD_senduc(' ');
|
|
}else
|
|
{
|
|
}
|
|
////L1_uartD_senduchex(i); L1_uartD_senduc(' ');
|
|
}else
|
|
{
|
|
|
|
}
|
|
|
|
ts_max30102.u16b = ts_max30102.dfifo[i].RED2;
|
|
ts_max30102.red =(U32)ts_max30102.u16b;
|
|
ts_max30102.red <<= 16 ;
|
|
|
|
ts_max30102.u16d = ts_max30102.dfifo[i].RED1;
|
|
ts_max30102.u16d <<= 8;
|
|
ts_max30102.u16d |= ts_max30102.dfifo[i].RED0;
|
|
|
|
ts_max30102.red |= (U32)ts_max30102.u16d;
|
|
|
|
//////////////////////
|
|
ts_max30102.u16b = ts_max30102.dfifo[i].IR2;
|
|
ts_max30102.ir =(U32)ts_max30102.u16b;
|
|
ts_max30102.ir <<= 16 ;
|
|
|
|
ts_max30102.u16d = ts_max30102.dfifo[i].IR1;
|
|
ts_max30102.u16d <<= 8;
|
|
|
|
ts_max30102.u16d |= ts_max30102.dfifo[i].IR0;
|
|
|
|
ts_max30102.ir |= (U32)ts_max30102.u16d;
|
|
|
|
L2_max30102_hh();/////
|
|
|
|
|
|
ts_max30102.u322 = ts_max30102.RED_out2/4000L;
|
|
ts_max30102.u162 = ts_max30102.u322;
|
|
ts_max30102.u81 = ts_max30102.u162;
|
|
ts_max30102.send[i] = ts_max30102.u81;
|
|
|
|
|
|
/// printf("\r\n%d %lu %lu ",(int)i,ts_max30102.red,ts_max30102.ir);
|
|
/// ts_max30102.datok = 1;
|
|
|
|
}
|
|
|
|
///ts_max30102.fifo_ok = 1;
|
|
L2_task_go(D_task_m32_SPO);
|
|
TTSS_Task_step(D_task_m32_SPO):
|
|
/// L2_max30102_hh();
|
|
|
|
|
|
/// printf("\r\n%d %lu %lu ",(int)i,ts_max30102.red,ts_max30102.ir);
|
|
L2_task_go(D_task_m32_out);
|
|
TTSS_Task_step(D_task_m32_out):
|
|
//// 0-1-2-3-4-5-6-7 127/8=16
|
|
|
|
|
|
|
|
if(ts_max30102.SPO2_ok)
|
|
{
|
|
ts_max30102.SPO2_ok = 0;
|
|
if(ts_max30102.SPO2_out_temp != ts_max30102.SPO2_out)
|
|
{
|
|
ts_max30102.SPO2_out_temp = ts_max30102.SPO2_out;
|
|
D_SHOW_oxygen(ts_max30102.SPO2_out);
|
|
}
|
|
}
|
|
if(ts_max30102.hr_ok)
|
|
{
|
|
ts_max30102.hr_ok = 0;
|
|
if(ts_max30102.hr_out2_temp != ts_max30102.hr_out2)
|
|
{
|
|
ts_max30102.hr_out2_temp = ts_max30102.hr_out2;
|
|
D_SHOW_heart(ts_max30102.hr_out2);
|
|
}
|
|
}
|
|
|
|
/// ts_max30102.SPO2_out = 99;
|
|
/// ts_max30102.hr_out2 = 123;
|
|
// L2_OLED_Showint2(5*8,0,ts_max30102.SPO2_out,16);
|
|
// L2_OLED_Showint3(5*8,2,ts_max30102.hr_out2,16);
|
|
|
|
L2_task_go(D_task_m32_ask);
|
|
TTSS_Task_end();
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#if 0
|
|
8x16
|
|
128/8=16
|
|
0 1 2 3 4 5 6 7
|
|
|
|
|
|
|
|
|
|
void max30102_read_fifo222222(void)
|
|
{
|
|
|
|
U32 un_temp;
|
|
|
|
/**************
|
|
|
|
ts_max30102.fifo_red=0;
|
|
ts_max30102.fifo_ir=0;
|
|
|
|
for(i=0;i<6;i++)
|
|
{
|
|
ts_max30102.d[i]=0;
|
|
}
|
|
|
|
printf("\r\n");
|
|
|
|
for(m = 0;m<=0x12;m ++)
|
|
{
|
|
s=IIC_Read_Byte(MAX30102_Device_address,m);
|
|
printf("\r\nreg(%2x %d) = %2X %d ",(int)m,(int)m,(int)s,(u16)s);
|
|
}
|
|
printf("\r\n");
|
|
|
|
|
|
|
|
|
|
ts_max30102.s= IIC_Read_Byte(MAX30102_Device_address,REG_TEMP_INTR);
|
|
// s=0x12;
|
|
ts_max30102.s2= IIC_Read_Byte(MAX30102_Device_address,REG_TEMP_FRAC);
|
|
/// printf(" tmp %2X %2X %d.%d",(int)s,(int)s2,(int)s,(int)s2);
|
|
//read and clear statu
|
|
ts_max30102.s= IIC_Read_Byte(MAX30102_Device_address,REG_INTR_STATUS_1);
|
|
// s=0x12;
|
|
ts_max30102.s2= IIC_Read_Byte(MAX30102_Device_address,REG_INTR_STATUS_2);
|
|
//// printf("\r\nsta %X %X %X --",(int)0xAA,(int)ts_max30102.s,(int)ts_max30102.s2);
|
|
|
|
|
|
#define REG_FIFO_WR_PTR 0x04
|
|
#define REG_OVF_COUNTER 0x05
|
|
#define REG_FIFO_RD_PTR 0x06
|
|
40 40 1C 00 00
|
|
40 00 1D 00 00
|
|
40 00 1E 00 00
|
|
40 C0 00 00 00
|
|
|
|
|
|
Status 1
|
|
B7 B6 B5 B4 B3 B2 B1 B0 ADDR POR_STATE
|
|
A_FULL PPG_RDY ALC_OVF PWR_RDY 0x00 0X00 R
|
|
|
|
*************/
|
|
|
|
Lc_delay_ms(1);
|
|
|
|
ts_max30102.s= IIC_Read_Byte(MAX30102_Device_address,REG_INTR_STATUS_1);
|
|
L1_uartD_senduc(' ');
|
|
L1_uartD_senduchex(ts_max30102.s);
|
|
|
|
// ts_max30102.s= IIC_Read_Byte(MAX30102_Device_address,REG_FIFO_CONFIG);
|
|
// L1_uartD_senduc(' ');
|
|
// L1_uartD_senduchex(ts_max30102.s);
|
|
|
|
ts_max30102.s= IIC_Read_Byte(MAX30102_Device_address,REG_FIFO_WR_PTR);
|
|
L1_uartD_senduc(' ');
|
|
L1_uartD_senduchex(ts_max30102.s);
|
|
ts_max30102.s= IIC_Read_Byte(MAX30102_Device_address,REG_OVF_COUNTER);
|
|
L1_uartD_senduc(' ');
|
|
L1_uartD_senduchex(ts_max30102.s);
|
|
ts_max30102.s= IIC_Read_Byte(MAX30102_Device_address,REG_FIFO_RD_PTR);
|
|
L1_uartD_senduc(' ');
|
|
L1_uartD_senduchex(ts_max30102.s);
|
|
|
|
|
|
L1_uartD_0d0a();
|
|
|
|
/// ts_max30102.d[0]=REG_FIFO_DATA;
|
|
/// L1_max30102_Read_Array(REG_FIFO_DATA,ts_max30102.d,6);
|
|
///
|
|
/// L1_uartD_uchexArray(ts_max30102.d,6);
|
|
|
|
|
|
/********
|
|
printf("fifo :%2X %2X %2X %2X %2X %2X ",
|
|
(int)ts_max30102.d[0],(int)ts_max30102.d[1],(int)ts_max30102.d[2],
|
|
(int)ts_max30102.d[3],(int)ts_max30102.d[4],(int)ts_max30102.d[5]);
|
|
|
|
|
|
|
|
for(i=0;i<6;i++)
|
|
{
|
|
ts_max30102.d[i]=0x40+i;
|
|
}
|
|
|
|
printf("fifo :%2X %2X %2X %2X %2X %2X ",
|
|
(int)ts_max30102.d[0],(int)ts_max30102.d[1],(int)ts_max30102.d[2],
|
|
(int)ts_max30102.d[3],(int)ts_max30102.d[4],(int)ts_max30102.d[5]);
|
|
|
|
*******/
|
|
|
|
/************
|
|
un_temp=ts_max30102.d[0];
|
|
|
|
ts_max30102.fifo_red=un_temp<<16;
|
|
|
|
un_temp=ts_max30102.d[1];
|
|
un_temp<<=8;
|
|
ts_max30102.fifo_red|=un_temp;
|
|
un_temp=ts_max30102.d[2];
|
|
// un_temp>>=2;
|
|
ts_max30102.fifo_red|=un_temp;
|
|
|
|
|
|
|
|
|
|
un_temp=ts_max30102.d[3];
|
|
ts_max30102.fifo_ir = un_temp<<16;
|
|
un_temp=ts_max30102.d[4];
|
|
un_temp<<=8;
|
|
ts_max30102.fifo_ir|=un_temp;
|
|
un_temp=ts_max30102.d[5];
|
|
/// un_temp>>=2;
|
|
ts_max30102.fifo_ir|=un_temp;
|
|
|
|
ts_max30102.u16out_c = D_2uc_u16(ts_max30102.d[2],ts_max30102.d[5]);
|
|
|
|
|
|
L1_uartD_sendulhex(ts_max30102.fifo_red);
|
|
/// Lc_delay_ms(1);
|
|
L1_uartD_senduc('R');
|
|
L1_uartD_sendulhex(ts_max30102.fifo_ir);
|
|
// if(ts_max30102.fifo_ir<=10000)
|
|
// {
|
|
// ts_max30102.fifo_ir=0;
|
|
// }
|
|
// if(ts_max30102.fifo_red<=10000)
|
|
// {
|
|
// ts_max30102.fifo_red=0;
|
|
// }
|
|
|
|
|
|
// USART_SendData(USART_PORT,ts_max30102.fifo_red);
|
|
// while (USART_GetFlag Status(USART_PORT, USART_FLAG_TXE) == RESET);
|
|
// printf("%d %d\r\n",ts_max30102.fifo_red,ts_max30102.fifo_ir);
|
|
// Delay_ms(100);
|
|
|
|
****************/
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void L0_MAX30102_Config(void)
|
|
{
|
|
L1_max30102_WB(REG_MODE_CONFIG, 0x40);///reset = 1;
|
|
Lc_delay_ms(30);
|
|
// L1_max30102_WB(REG_INTR_ENABLE_1,0xc0);//// INTR setting 1100 A_FULL_EN PPG_RDY_EN
|
|
// L1_max30102_WB(REG_INTR_ENABLE_2,0x00);//
|
|
L1_max30102_WB(REG_INTR_ENABLE_1,0x00);//// INTR setting 1100 A_FULL_EN PPG_RDY_EN
|
|
L1_max30102_WB(REG_INTR_ENABLE_2,0x00);//
|
|
|
|
/*********
|
|
REGISTER FIFO Configuration
|
|
B7 B6 B5 B4 B3 B2 B1 B0 REG ADDR POR STATE
|
|
SMP_AVE[2:0] FIFO_ROL LOVER_EN FIFO_A_FULL[3:0] 0x08 0x00 R/W
|
|
****/
|
|
|
|
|
|
/// 20220913_82240 CCmodify L1_max30102_WB(REG_FIFO_CONFIG,0x0f);//sample avg = 1, fifo rollover=false, fifo almost full = 17
|
|
L1_max30102_WB(REG_FIFO_CONFIG,0x00);//sample avg = 1, fifo rollover=false, fifo almost full = 0
|
|
////需要配置成中断的时候获取 在定时器中读取标志位作为fifo ok的判断
|
|
|
|
L1_max30102_WB(REG_MODE_CONFIG, D_m32_mode_SPO2);//0x02 for Red only, 0x03 for SpO2 mode 0x07 multimode LED
|
|
L1_max30102_WB(REG_SPO2_CONFIG,0x27); // SPO2_ADC range = 4096nA, SPO2 sample rate (100 Hz), 18bits LED pulseWidth (400uS)
|
|
L1_max30102_WB(REG_LED1_PA,0x32);//Choose value for ~ 10mA for LED1
|
|
L1_max30102_WB(REG_LED2_PA,0x32);// Choose value for ~ 10mA for LED2
|
|
L1_max30102_WB(REG_PILOT_PA,0x7f);// Choose value for ~ 25mA for Pilot LED
|
|
|
|
|
|
L1_max30102_WB(REG_FIFO_WR_PTR,0x00);//FIFO_WR_PTR[4:0]
|
|
L1_max30102_WB(REG_OVF_COUNTER,0x00);//OVF_COUNTER[4:0]
|
|
L1_max30102_WB(REG_FIFO_RD_PTR,0x00);//FIFO_RD_PTR[4:0]
|
|
|
|
|
|
}
|
|
|
|
if(d > 4)
|
|
{
|
|
d = 0;
|
|
L2_task_go(D_task_m32_01);
|
|
L1_task_Tdelay(D_Tdelay_100ms);
|
|
}else
|
|
{
|
|
d ++;
|
|
}
|
|
|
|
|
|
if(d > 8)
|
|
{
|
|
d = 0;
|
|
L2_task_go(D_task_m32_02);
|
|
L1_task_Cdelay(D_Cdelay_200us);
|
|
}else
|
|
{
|
|
d ++;
|
|
}
|
|
|
|
void L2_timer4max30102_callbackyyyy(void)
|
|
{
|
|
|
|
//// TIM_ClearITPendingBit(TIM3, TIM_IT_Update ); //清除TIMx更新中断标志
|
|
max30102_read_fifo();//数据读入
|
|
ts_max30102.i++;//记录周期数
|
|
int temp=fifo_ir;
|
|
int temp2=fifo_red;
|
|
while(ts_max30102.temp+ts_max30102.temp2<20000)
|
|
{//未检测出手指时代码会在此处跑死，原因为拟合函数只在检测到手指时有效
|
|
printf("未检测出手指\r\n");
|
|
max30102_read_fifo();
|
|
ts_max30102.temp=ts_max30102.fifo_ir;
|
|
ts_max30102.temp2=ts_max30102.fifo_red;
|
|
}
|
|
|
|
|
|
if(ts_max30102.i==0){//周期数值初始
|
|
ts_max30102.max=ts_max30102.temp;
|
|
ts_max30102.min=ts_max30102.temp;
|
|
ts_max30102.max2=ts_max30102.temp2;
|
|
ts_max30102.min2=ts_max30102.temp2;
|
|
}
|
|
//取得周期内最大最小数据
|
|
if(ts_max30102.max<ts_max30102.temp){ ts_max30102.max=ts_max30102.temp; }
|
|
if(ts_max30102.min>ts_max30102.temp){ ts_max30102.min=ts_max30102.temp; }
|
|
if(ts_max30102.max2<ts_max30102.temp2){ ts_max30102.max2=ts_max30102.temp2; }
|
|
if(ts_max30102.min2>ts_max30102.temp2){ ts_max30102.min2=ts_max30102.temp2; }
|
|
|
|
if(ts_max30102.i>=39)
|
|
{//39数据为1周期
|
|
ts_max30102.i=0;
|
|
ts_max30102.ac=ts_max30102.max-ts_max30102.min;//单个周期内最大最小数据差为交流分量
|
|
ts_max30102.dc=ts_max30102.min; //数据=直流分量+交流分量
|
|
ts_max30102.ac2=ts_max30102.max2-ts_max30102.min2;//同理
|
|
ts_max30102.dc2=ts_max30102.min2;
|
|
ts_max30102.max=ts_max30102.temp;
|
|
ts_max30102.min=ts_max30102.temp;
|
|
ts_max30102.max2=ts_max30102.temp2;
|
|
ts_max30102.min2=ts_max30102.temp2;
|
|
}
|
|
|
|
//结果生成，数据较为稳定，开头几个数据可以不要，比较不稳
|
|
ts_max30102.ac_ir=(float)ts_max30102.ac;//注意转换，否则无法赋值
|
|
ts_max30102.dc_ir=(float)ts_max30102.dc;
|
|
ts_max30102.ac_red=(float)ts_max30102.ac2;
|
|
ts_max30102.dc_red=(float)ts_max30102.dc2;
|
|
ts_max30102.R2=(ts_max30102.ac_red* ts_max30102.dc_ir)/(ts_max30102.ac_ir*ts_max30102.dc_red);
|
|
ts_max30102.SPO2 =-45.060*ts_max30102.R2*ts_max30102.R2+ 30.354 *ts_max30102.R2 + 94.845;
|
|
|
|
}
|
|
|
|
|
|
void MAX30102_Config222(void)
|
|
{
|
|
u8 id1,id2,rr = 0xE5;
|
|
|
|
L1_max30102_WB(REG_MODE_CONFIG, 0x40);
|
|
Lc_delay_ms(200);
|
|
//read and clear statu
|
|
id1= IIC_Read_Byte(MAX30102_Device_address,REG_REV_ID);
|
|
|
|
id2= IIC_Read_Byte(MAX30102_Device_address,REG_PART_ID);
|
|
///printf("\r\nMAX30102_Config %x %x \r\n",(int)id1,(int)id2);
|
|
printf("\r\nMAX30102_Config %X %X %X \r\n",(int)rr,(int)id1,(int)id2);
|
|
|
|
L1_max30102_WB(REG_INTR_ENABLE_1,0x00);//// L1_max30102_WB(REG_INTR_ENABLE_1,0xc0);//// INTR setting
|
|
|
|
|
|
L1_max30102_WB(REG_INTR_ENABLE_2,0x00);//
|
|
L1_max30102_WB(REG_FIFO_WR_PTR,0x00);//FIFO_WR_PTR[4:0]
|
|
L1_max30102_WB(REG_OVF_COUNTER,0x00);//OVF_COUNTER[4:0]
|
|
L1_max30102_WB(REG_FIFO_RD_PTR,0x00);//FIFO_RD_PTR[4:0]
|
|
|
|
L1_max30102_WB(REG_FIFO_CONFIG,0x0f);//sample avg = 1, fifo rollover=false, fifo almost full = 17
|
|
L1_max30102_WB(REG_MODE_CONFIG,0x03);//0x02 for Red only, 0x03 for SpO2 mode 0x07 multimode LED
|
|
L1_max30102_WB(REG_SPO2_CONFIG,0x27); // SPO2_ADC range = 4096nA, SPO2 sample rate (50 Hz), LED pulseWidth (400uS)
|
|
L1_max30102_WB(REG_LED1_PA,0x32);//Choose value for ~ 10mA for LED1
|
|
L1_max30102_WB(REG_LED2_PA,0x32);// Choose value for ~ 10mA for LED2
|
|
L1_max30102_WB(REG_PILOT_PA,0x7f);// Choose value for ~ 25mA for Pilot LED
|
|
|
|
L1_max30102_WB(REG_TEMP_CONFIG,1);
|
|
}
|
|
|
|
void MAX30102_Configbbb(void)
|
|
{
|
|
u8 id1,id2,rr = 0xE5;
|
|
|
|
L1_max30102_WB(REG_MODE_CONFIG, 0x40);
|
|
Lc_delay_ms(200);
|
|
//read and clear statu
|
|
id1= IIC_Read_Byte(MAX30102_Device_address,REG_REV_ID);
|
|
|
|
id2= IIC_Read_Byte(MAX30102_Device_address,REG_PART_ID);
|
|
///printf("\r\nMAX30102_Config %x %x \r\n",(int)id1,(int)id2);
|
|
printf("\r\nMAX30102_Config %X %X %X \r\n",(int)rr,(int)id1,(int)id2);
|
|
|
|
|
|
|
|
L1_max30102_WB(REG_INTR_ENABLE_1,0x00);//// L1_max30102_WB(REG_INTR_ENABLE_1,0xc0);//// INTR setting
|
|
|
|
|
|
L1_max30102_WB(REG_INTR_ENABLE_2,0x00);//
|
|
|
|
///清空
|
|
L1_max30102_WB(REG_FIFO_WR_PTR,0x00);//FIFO_WR_PTR[4:0]
|
|
L1_max30102_WB(REG_OVF_COUNTER,0x00);//OVF_COUNTER[4:0]
|
|
L1_max30102_WB(REG_FIFO_RD_PTR,0x00);//FIFO_RD_PTR[4:0]
|
|
|
|
L1_max30102_WB(REG_FIFO_CONFIG,0x0f);//sample avg = 1, fifo rollover=false, fifo almost full = 17
|
|
L1_max30102_WB(REG_MODE_CONFIG,0x03);//0x02 for Red only, 0x03 for SpO2 mode 0x07 multimode LED
|
|
L1_max30102_WB(REG_SPO2_CONFIG,0x2B); // //SPO2_ADC range = 4096nA, 200Hz, LED pulseWidth (411uS) ,18bit
|
|
L1_max30102_WB(REG_LED1_PA,0x40);//Choose value for ~ 10mA for LED1
|
|
L1_max30102_WB(REG_LED2_PA,0x40);// Choose value for ~ 10mA for LED2
|
|
L1_max30102_WB(REG_PILOT_PA,0x01);// Choose value for ~ 25mA for Pilot LED
|
|
|
|
L1_max30102_WB(REG_TEMP_CONFIG,1);
|
|
}
|
|
|
|
|
|
|
|
[16:32:10.800]收←◆
|
|
stcTTSS2_lora v4.4
|
|
Sep 15 202223:40:47
|
|
main while
|
|
L0_OLED_io_int
|
|
[16:32:11.837]收←◆OLED_Clear
|
|
[16:32:13.002]收←◆.
|
|
L2_task_m32_handle
|
|
D_task_m32_HR 41 00 01 00 00
|
|
40 00 02 00 00
|
|
40 00 03 00 00
|
|
40 00 04 00 00
|
|
40 00 05 00 00
|
|
40 00 06 00 00
|
|
40 00 07 00 00
|
|
40 00 08 00 00
|
|
40 00 09 00 00
|
|
40 00 0A 00 00
|
|
40 00 0B 00 00
|
|
40 00 0C 00 00
|
|
40 00 0D 00 00
|
|
40 00 0E 00 00
|
|
40 00 0F 00 00
|
|
40 00 10 00 00
|
|
40 00 11 00 00
|
|
40 00 12 00 00
|
|
40 00 13 00 00
|
|
40 00 14 00 00
|
|
40 00 15 00 00
|
|
40 00 16 00 00
|
|
40 00 17 00 00
|
|
40 00 18 00 00
|
|
40 00 19 00 00
|
|
40 00 1A 00 00
|
|
40 00 1B 00 00
|
|
40 00 1C 00 00
|
|
40 00 1D 00 00
|
|
40 00 1E 00 00
|
|
40 00 1F 00 00
|
|
C0 00 00 01 00
|
|
40 00 00 02 00
|
|
40 00 00 03 00
|
|
40 00 00 04 00
|
|
40 00 00 05 00
|
|
40 00 00 06 00
|
|
40 00 00 07 00
|
|
40 00 00 08 00
|
|
40 00 00 09 00
|
|
ts_max30102.HRok 40 00 00 0A 00
|
|
40 00 00 0B 00
|
|
40 00 00 0C 00
|
|
40 00 00 0D 00
|
|
|
|
[16:32:13.474]收←◆ 40 00 00 0E 00
|
|
40 00 00 0F 00
|
|
40 00 00 10 00
|
|
40 00 00 11 00
|
|
40 00
|
|
[16:32:13.525]收←◆ 00 12 00
|
|
40 00 00 13 00
|
|
40 00 00 14 00
|
|
40 00 00 15 00
|
|
40 00 00 16 00
|
|
40 00 00 17
|
|
[16:32:13.589]收←◆ 00
|
|
40 00 00 18 00
|
|
40 00 00 19 00
|
|
40 00 00 1A 00
|
|
40 00 00 1B 00
|
|
40 00 00 1C 00
|
|
40 00 00 1D
|
|
[16:32:13.632]收←◆ 00
|
|
40 00 00 1E 00
|
|
40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40
|
|
[16:32:13.687]收←◆ 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40 00
|
|
[16:32:13.712]收←◆ 00 1F 00
|
|
40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
|
|
[16:32:13.775]收←◆ 40 00 00 1F 00
|
|
40 00 00 1F 00
|
|
40
|
|
|
|
|
|
|
|
|
|
stcTTSS2_lora v4.4
|
|
Sep 15 202223:40:47
|
|
main while
|
|
L0_OLED_io_intOLED_Clear.
|
|
L2_task_m32_handle
|
|
D_task_m32_HR 41 00 01 00 00
|
|
00 00 03 00 02
|
|
40 00 04 00 03
|
|
00 00 05 00 05
|
|
00 00 07 00 06
|
|
00 00 08 00 08
|
|
00 00 09 00 09
|
|
00 00 0B 00 0A
|
|
00 00 0C 00 0C
|
|
00 00 0E 00 0D
|
|
40 00 0F 00 0E
|
|
00 00 10 00 10
|
|
00 00 12 00 11
|
|
00 00 13 00 13
|
|
00 00 15 00 14
|
|
40 00 16 00 15
|
|
00 00 17 00 17
|
|
00 00 19 00 18
|
|
00 00 1A 00 1A
|
|
00 00 1B 00 1B
|
|
00 00 1D 00 1C
|
|
00 00 1E 00 1E
|
|
00 00 00 00 1F
|
|
40 00 01 00 00
|
|
00 00 02 00 02
|
|
00 00 04 00 03
|
|
00 00 05 00 05
|
|
00 00 07 00 06
|
|
40 00 08 00 07
|
|
00 00 09 00 09
|
|
00 00 0B 00 0A
|
|
00 00 0C 00 0C
|
|
00 00 0D 00 0D
|
|
00 00 0F 00 0E
|
|
00 00 10 00 10
|
|
00 00 12 00 11
|
|
40 00 13 00 12
|
|
00 00 14 00 14
|
|
00 00 16 00 15
|
|
00 00 17 00 17
|
|
ts_max30102.HRok 00 00 19 00 18
|
|
00 00 1A 00 1A
|
|
00 00 1C 00 1B
|
|
40 00 1D 00 1C
|
|
00 00 1E 00 1E
|
|
00 00 00 00 1F
|
|
00 00 01 00 01
|
|
00 00 03 00 02
|
|
40 00 04 00 03
|
|
00 00 05 00 05
|
|
00 00 07 00 06
|
|
00 00 08 00 08
|
|
00 00 09 00 09
|
|
00 00 0B 00 0A
|
|
00 00 0C 00 0C
|
|
00 00 0E 00 0D
|
|
40 00 0F 00 0E
|
|
00 00 10 00 10
|
|
00 00 12 00 11
|
|
00 00 13 00 13
|
|
00 00 15 00 14
|
|
40 00 16 00 15
|
|
00 00 17 00 17
|
|
00 00 19 00 18
|
|
00 00 1A 00 1A
|
|
00 00 1B 00 1B
|
|
00 00 1D 00 1C
|
|
00 00 1E 00 1E
|
|
00 00 00 00 1F
|
|
40 00 01 00 00
|
|
00 00 02 00 02
|
|
00 00 04 00 03
|
|
00 00 05 00 05
|
|
00 00 07 00 06
|
|
40 00 08 00 07
|
|
00 00 09 00 09
|
|
00 00 0B 00 0A
|
|
00 00 0C 00 0C
|
|
00 00 0D 00 0D
|
|
ts_max30102.HRok . 40 00 0F 00 0E
|
|
00 00 11 00 10
|
|
40 00 12 00 11
|
|
00 00 13 00 13
|
|
00 00 15 00 14
|
|
00 00 16 00 16
|
|
00 00 17 00 17
|
|
00 00 19 00 18
|
|
00 00 1A 00 1A
|
|
00 00 1C 00 1B
|
|
40 00 1D 00 1C
|
|
00 00 1E 00 1E
|
|
00 00 00 00 1F
|
|
00 00 01 00 01
|
|
00 00 03 00 02
|
|
40 00 04 00 03
|
|
00 00 05 00 05
|
|
00 00 07 00 06
|
|
00 00 08 00 08
|
|
00 00 09 00 09
|
|
00 00 0B 00 0A
|
|
00 00 0C 00 0C
|
|
00 00 0E 00 0D
|
|
40 00 0F 00 0E
|
|
00 00 10 00 10
|
|
00 00 12 00 11
|
|
00 00 13 00 13
|
|
00 00 15 00 14
|
|
40 00 16 00 15
|
|
00 00 17 00 17
|
|
00 00 19 00 18
|
|
00 00 1A 00 1A
|
|
00 00 1C 00 1B
|
|
40 00 1D 00 1C
|
|
00 00 1E 00 1E
|
|
00 00 00 00 1F
|
|
40 00 01 00 00
|
|
00 00 02 00 02
|
|
00 00 04 00 03
|
|
ts_max30102.HRok 00 00 05 00 05
|
|
00 00 07 00 06
|
|
00 00 08 00 08
|
|
00 00 0A 00 09
|
|
40 00 0B 00 0A
|
|
00 00 0C 00 0C
|
|
00 00 0E 00 0D
|
|
00 00 0F 00 0F
|
|
00 00 11 00 10
|
|
40 00 12 00 11
|
|
00 00 13 00 13
|
|
00 00 15 00 14
|
|
00 00 16 00 16
|
|
00 00 18 00 17
|
|
00 00 19 00 18
|
|
00 00 1A 00 1A
|
|
00 00 1C 00 1B
|
|
40 00 1D 00 1C
|
|
00 00 1E 00 1E
|
|
00 00 00 00 1F
|
|
00 00 01 00 01
|
|
00 00 03 00 02
|
|
40 00 04 00 03
|
|
00 00 05 00 05
|
|
00 00 07 00 06
|
|
00 00 08 00 08
|
|
00 00 0A 00 09
|
|
40 00 0B 00 0A
|
|
00 00 0C 00 0C
|
|
00 00 0E 00 0D
|
|
40 00 0F 00 0E
|
|
00 00 10 00 10
|
|
00 00 12 00 11
|
|
00 00 13 00 13
|
|
00 00 15 00 14
|
|
40 00 16 00 15
|
|
00 00 17 00 17
|
|
00 00 19 00 18
|
|
00 00 1A 00 1A
|
|
ts_max30102.HRok 00 00 1C 00 1B
|
|
00 00 1D 00 1D
|
|
00 00 1F 00 1E
|
|
40 00 00 00 1F
|
|
00 00 01 00 01
|
|
00 00 03 00 02
|
|
00 00 04 00 04
|
|
00 00 06 00 05
|
|
40 00 07 00 06
|
|
00 00 08 00 08
|
|
00 00 0A 00 09
|
|
40 00 0B 00 0A
|
|
00 00 0C 00 0C
|
|
00 00 0E 00 0D
|
|
00 00 0F 00 0F
|
|
00 00 11 00 10
|
|
40 00 12 00 11
|
|
|
|
|
|
#endif
|
|
|
|
/******************************END*********************************/
|
|
|
|
|
|
|