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C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 1
C51 COMPILER V9.54, COMPILATION OF MODULE MSP_IICMX
OBJECT MODULE PLACED IN ..\out\msp_iicMx.obj
COMPILER INVOKED BY: E:\KeilC51\C51\BIN\C51.EXE ..\source\msp\msp_iicMx.c LARGE OMF2 OPTIMIZE(0,SIZE) BROWSE ORDER NOINT
-PROMOTE INCDIR(..\source\bsp;..\source\msp;..\source\app;..\source\clib;..\source\cpu;..\source\ctask;..\source\tpc;..\s
-ource\asp;..\source\debug;..\source\msp\uart;..\source\msp\simiic;..\source\bsp\oled;..\source\bsp\TTSSbsp) DEBUG PRINT(
-..\out\msp_iicMx.lst) TABS(2) OBJECT(..\out\msp_iicMx.obj)
line level source
1 //////////////////////////////////////////////////////////////////////////
2 /// COPYRIGHT NOTICE
3 /// Copyright (c) 2023 CCSENS
4 /// All rights reserved.
5 ///
6 /// @file iic_sim
7 /// @brief iic 模拟io 版本， å’Œcpu无关，唯一需è¦�修改的就是头函数中的管è„
-šå®šä¹‰
8 /// @info 如无必�请勿修改
9 ///（本文件实现的功能的详述）
10 ///
11 /// @version 1.1 CCsens technology
12 /// @author CC
13 /// @date 20180102
14 /// @version 1.2 CCsens technology
15 /// @author CC
16 /// @date 20230312
17
18 //
19 //////////////////////////////////////////////////////////////////////////
20
21 #include "msp_iicMx.h"
*** WARNING C320 IN LINE 51 OF ..\source\bsp\TTSSbsp\bsp_config.h: "MainFre_22M"
22 #include "stc_8_delay.h"
23
24 TS_iicm_ ts_iicm;
25
26 /*------------------------------------------------
27 端�定义
28 在I2C总线传输数�过程中，�传输一个字节，
29 都�跟一个应答状��。接收器接收数�的情况
30 �以通过应答��告知��器。应答�的时钟脉冲
31 �由主机产生，而应答�的数�状�则�循“�
32 接收�产生�的原则，�总是由接收器产生应答�，
33 在�应的时钟脉冲期间接收器必须将SDA 线拉
34 低，使它在这个时钟脉冲的高电平期间��稳定的低电平（�图9） ，
35 当然必须考虑建立和��时间
36 （详细请查阅表6） 。主机�从机��数�时，
37 应答�由从机产生；主机从从机接收数�时，应答�
38 由主机产生。
39 I2C总线标准规定： 应答�为0表示接收器应答 （ACK） ，
40 常常简记为A； 为1则表示�应答 （NACK） ，
41 常简记为NA。��器��LSB之�，应当释放SDA线（拉高SDA） ，
42 以等待接收器产生应答�。
43 如果接收器在接收完最�一个字节的数�，
44 或者�能�接收更多的数�时，应当产生�应答信
45 ��通知��器。��器如果�现接收器产生了�应答状�，
46 则应当终止��。
47
48 ------------------------------------------------*/
49 ///<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
50
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 2
51
52 void L0_IICMx_SDA_outin(vtype ch,vtype v)
53 {
54 1 if(v)///输出
55 1 {
56 2 switch (ch)
57 2 {
58 3 case D_iicch_0:
59 3 L0_IICM0_SDA_OUT();
60 3 break;
61 3 case D_iicch_1:
62 3 L0_IICM1_SDA_OUT();
63 3 #ifdef D_SIIC_USE_2
case D_iicch_2:
L0_IICM2_SDA_OUT();
break;
#endif
68 3 #ifdef D_SIIC_USE_3
case D_iicch_3:
L0_IICM3_SDA_OUT();
break;
#endif
73 3 #ifdef D_SIIC_USE_4
case D_iicch_4:
L0_IICM4_SDA_OUT();
break;
#endif
78 3 #ifdef D_SIIC_USE_5
case D_iicch_5:
L0_IICM5_SDA_OUT();
break;
#endif
83 3 #ifdef D_SIIC_USE_6
case D_iicch_6:
L0_IICM6_SDA_OUT();
break;
#endif
88 3 #ifdef D_SIIC_USE_7
case D_iicch_7:
L0_IICM7_SDA_OUT();
break;
#endif
93 3 #ifdef D_SIIC_USE_8
case D_iicch_8:
L0_IICM8_SDA_OUT();
break;
#endif
98 3 default:
99 3 break;
100 3
101 3 }
102 2 // L0_slc_1_delay();
103 2 }
104 1 else
105 1 {
106 2 switch (ch)
107 2 {
108 3 case D_iicch_0:
109 3 L0_IICM0_SDA_IN();
110 3 break;
111 3 case D_iicch_1:
112 3 L0_IICM1_SDA_IN();
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 3
113 3 break;
114 3 #ifdef D_SIIC_USE_2
case D_iicch_2:
L0_IICM2_SDA_IN();
break;
#endif
119 3 #ifdef D_SIIC_USE_3
case D_iicch_3:
L0_IICM3_SDA_IN();
break;
#endif
124 3 #ifdef D_SIIC_USE_4
case D_iicch_4:
L0_IICM4_SDA_IN();
break;
#endif
129 3 #ifdef D_SIIC_USE_5
case D_iicch_5:
L0_IICM5_SDA_IN();
break;
#endif
134 3 #ifdef D_SIIC_USE_6
case D_iicch_6:
L0_IICM6_SDA_IN();
break;
#endif
139 3 #ifdef D_SIIC_USE_7
case D_iicch_7:
L0_IICM7_SDA_IN();
break;
#endif
144 3 #ifdef D_SIIC_USE_8
case D_iicch_8:
L0_IICM8_SDA_IN();
break;
#endif
150 3 default:
151 3 break;
152 3
153 3 }
154 2 // L0_slc_f_delay();
155 2 }
156 1
157 1 }
158
159
160 void L0_IICMx_SDA(vtype ch,vtype v)
161 {
162 1 if(v)
163 1 {
164 2 switch (ch)
165 2 {
166 3 case D_iicch_0:
167 3 L0_IICM0_SDA_ON();
168 3 break;
169 3 case D_iicch_1:
170 3 L0_IICM1_SDA_ON();
171 3 break;
172 3 #ifdef D_SIIC_USE_2
case D_iicch_2:
L0_IICM2_SDA_ON();
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 4
break;
#endif
177 3 #ifdef D_SIIC_USE_3
case D_iicch_3:
L0_IICM3_SDA_ON();
break;
#endif
182 3 #ifdef D_SIIC_USE_4
case D_iicch_4:
L0_IICM4_SDA_ON();
break;
#endif
187 3 #ifdef D_SIIC_USE_5
case D_iicch_5:
L0_IICM5_SDA_ON();
break;
#endif
192 3 #ifdef D_SIIC_USE_6
case D_iicch_6:
L0_IICM6_SDA_ON();
break;
#endif
197 3 #ifdef D_SIIC_USE_7
case D_iicch_7:
L0_IICM7_SDA_ON();
break;
#endif
202 3 #ifdef D_SIIC_USE_8
case D_iicch_8:
L0_IICM8_SDA_ON();
break;
#endif
207 3 default:
208 3 break;
209 3
210 3 }
211 2 // L0_slc_1_delay();
212 2 }
213 1 else
214 1 {
215 2 switch (ch)
216 2 {
217 3 case D_iicch_0:
218 3 L0_IICM0_SDA_OFF();
219 3 break;
220 3 case D_iicch_1:
221 3 L0_IICM1_SDA_OFF();
222 3
223 3 break;
224 3 #ifdef D_SIIC_USE_2
case D_iicch_2:
L0_IICM2_SDA_OFF();
break;
#endif
229 3 #ifdef D_SIIC_USE_3
case D_iicch_3:
L0_IICM3_SDA_OFF();
break;
#endif
234 3 #ifdef D_SIIC_USE_4
case D_iicch_4:
L0_IICM4_SDA_OFF();
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 5
break;
#endif
239 3 #ifdef D_SIIC_USE_5
case D_iicch_5:
L0_IICM5_SDA_OFF();
break;
#endif
244 3 #ifdef D_SIIC_USE_6
case D_iicch_6:
L0_IICM6_SDA_OFF();
break;
#endif
249 3 #ifdef D_SIIC_USE_7
case D_iicch_7:
L0_IICM7_SDA_OFF();
break;
#endif
254 3 #ifdef D_SIIC_USE_8
case D_iicch_8:
L0_IICM8_SDA_OFF();
break;
#endif
259 3 default:
260 3 break;
261 3
262 3 }
263 2 // L0_slc_f_delay();
264 2 }
265 1
266 1 }
267
268 void L0_IICMx_SCL(vtype ch,vtype v)
269 {
270 1 if(v)
271 1 {
272 2 switch (ch)
273 2 {
274 3 case D_iicch_0:
275 3 L0_IICM0_SCL_ON();
276 3 break;
277 3 case D_iicch_1:
278 3 L0_IICM1_SCL_ON();
279 3 break;
280 3 #ifdef D_SIIC_USE_2
case D_iicch_2:
L0_IICM2_SCL_ON();
break;
#endif
286 3 #ifdef D_SIIC_USE_3
case D_iicch_3:
L0_IICM3_SCL_ON();
break;
#endif
291 3 #ifdef D_SIIC_USE_4
case D_iicch_4:
L0_IICM4_SCL_ON();
break;
#endif
296 3 #ifdef D_SIIC_USE_5
case D_iicch_5:
L0_IICM5_SCL_ON();
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 6
break;
#endif
301 3 #ifdef D_SIIC_USE_6
case D_iicch_6:
L0_IICM6_SCL_ON();
break;
#endif
306 3 #ifdef D_SIIC_USE_7
case D_iicch_7:
L0_IICM7_SCL_ON();
break;
#endif
311 3 #ifdef D_SIIC_USE_8
case D_iicch_8:
L0_IICM8_SCL_ON();
break;
#endif
316 3 default:
317 3 break;
318 3 }
319 2 L0_slc_1_delay(ts_iicm.t1[ch]);
320 2 }
321 1 else
322 1 {
323 2 switch (ch)
324 2 {
325 3 case D_iicch_0:
326 3 L0_IICM0_SCL_OFF();
327 3 break;
328 3 case D_iicch_1:
329 3 L0_IICM1_SCL_OFF();
330 3 break;
331 3 #ifdef D_SIIC_USE_2
case D_iicch_2:
L0_IICM2_SCL_OFF();
break;
#endif
337 3 #ifdef D_SIIC_USE_3
case D_iicch_3:
L0_IICM3_SCL_OFF();
break;
#endif
342 3 #ifdef D_SIIC_USE_4
case D_iicch_4:
L0_IICM4_SCL_OFF();
break;
#endif
347 3 #ifdef D_SIIC_USE_5
case D_iicch_5:
L0_IICM5_SCL_OFF();
break;
#endif
352 3 #ifdef D_SIIC_USE_6
case D_iicch_6:
L0_IICM6_SCL_OFF();
break;
#endif
357 3 #ifdef D_SIIC_USE_7
case D_iicch_7:
L0_IICM7_SCL_OFF();
break;
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 7
#endif
362 3 #ifdef D_SIIC_USE_8
case D_iicch_8:
L0_IICM8_SCL_OFF();
break;
#endif
367 3 default:
368 3 break;
369 3 }
370 2
371 2 L0_slc_0_delay(ts_iicm.t0[ch]);
372 2 }
373 1
374 1 }
375
376 /*
377
378 void L0_IICMX_SCL(unsigned char v)
379 {
380 if(v)
381 {
382 L0_IICM1_SCL_ON();/// L0_SCL_ON();
383 L0_slc_1_delay();
384 }
385 else
386 {
387 L0_IICM1_SCL_OFF();///L0_SCL_OFF();
388 L0_slc_f_delay();
389 }
390 }
391 void L0_IICM1_SDA(unsigned char v)
392 {
393 if(v)
394 {
395 L0_IICM1_SDA_ON();
396 L0_slc_1_delay();
397 }
398 else
399 {
400 L0_IICM1_SDA_OFF();
401 L0_slc_f_delay();
402 }
403 }
404 */
405 void L0_IICMx_INIT(vtype ch ,vtype v)
406 {
407 1 if (v)
408 1 {
409 2 switch(ch)
410 2 {
411 3 case D_iicch_0:
412 3 L0_IICM0_SCL_init();
413 3 L0_IICM0_SDA_init();
414 3 break;
415 3 case D_iicch_1:
416 3 L0_IICM1_SCL_init();
417 3 L0_IICM1_SDA_init();
418 3 break;
419 3 #ifdef D_SIIC_USE_2
case D_iicch_2:
L0_IICM2_SCL_init();
L0_IICM2_SDA_init();
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 8
break;
#endif
425 3 #ifdef D_SIIC_USE_3
case D_iicch_3:
L0_IICM3_SCL_init();
L0_IICM3_SDA_init();
break;
#endif
431 3 #ifdef D_SIIC_USE_4
case D_iicch_4:
L0_IICM4_SCL_init();
L0_IICM4_SDA_init();
break;
#endif
437 3 #ifdef D_SIIC_USE_5
case D_iicch_5:
L0_IICM5_SCL_init();
L0_IICM5_SDA_init();
break;
#endif
443 3 #ifdef D_SIIC_USE_6
case D_iicch_6:
L0_IICM6_SCL_init();
L0_IICM6_SDA_init();
break;
#endif
449 3 #ifdef D_SIIC_USE_7
case D_iicch_7:
L0_IICM7_SCL_init();
L0_IICM7_SDA_init();
break;
#endif
455 3 #ifdef D_SIIC_USE_8
case D_iicch_8:
L0_IICM8_SCL_init();
L0_IICM8_SDA_init();
break;
#endif
461 3 default:
462 3 break;
463 3 }
464 2 L0_IICMx_SDA(ch,v);
465 2 L0_IICMx_SCL(ch,v);
466 2 }
467 1 else
468 1 {
469 2
470 2
471 2 }
472 1 }
473
474 unsigned char L0_IICMx_SDA_get(vtype ch)
475 {
476 1
477 1 switch(ch)
478 1 {
479 2 case D_iicch_0:
480 2 return L0_IICM0_SDA_AT();
481 2 case D_iicch_1:
482 2 return L0_IICM1_SDA_AT();
483 2
484 2 #ifdef D_SIIC_USE_2
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 9
case D_iicch_2:
return L0_IICM2_SDA_AT();
#endif
489 2 #ifdef D_SIIC_USE_3
case D_iicch_3:
return L0_IICM3_SDA_AT();
#endif
494 2 #ifdef D_SIIC_USE_4
case D_iicch_4:
return L0_IICM4_SDA_AT();
#endif
499 2 #ifdef D_SIIC_USE_5
case D_iicch_5:
return L0_IICM5_SDA_AT();
#endif
504 2 #ifdef D_SIIC_USE_6
case D_iicch_6:
return L0_IICM6_SDA_AT();
#endif
509 2 #ifdef D_SIIC_USE_7
case D_iicch_7:
return L0_IICM7_SDA_AT();
#endif
514 2 #ifdef D_SIIC_USE_8
case D_iicch_8:
return L0_IICM8_SDA_AT();
#endif
518 2 default:
519 2 break;
520 2 }
521 1 return 0;
522 1
523 1 }
524
525 #define L0_IIC_SIM_INIT(x)
526 #define L0_IIC_SIM_close(x)
527 //**********************************************
528 //�起始� IO_SDA=1->0
529 void L0_IICMx_Start(vtype ch)
530 {
531 1 ///L0_IIC_SIM_INIT();
532 1
533 1 L0_IICMx_SDA_outin(ch,1);
534 1 L0_IICMx_SDA(ch,1);
535 1 L0_IICMx_SCL(ch,1);
536 1 L0_IICMx_SDA(ch,0);
537 1 L0_slc_1_delay(ts_iicm.t1[ch]);
538 1 L0_slc_1_delay(ts_iicm.t1[ch]);
539 1 L0_IICMx_SCL(ch,0);
540 1
541 1 }
542 //************************************************
543 //��止� IO_SDA = 0->1
544 void L0_IICMx_Stop(vtype ch)
545 {
546 1
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 10
547 1 L0_IICMx_SDA(ch,0);
548 1
549 1 L0_IICMx_SCL(ch,1);
550 1
551 1 L0_IICMx_SDA(ch,1);
552 1 L0_IIC_SIM_INIT();
553 1 L0_IIC_SIM_close();
554 1 }
555
556
557 //************************************************
558 //主应答(包�ack:IO_SDA = 0和no_ack:IO_SDA = 0)
559 void L0_IICMx_Ack(vtype ch)
560 { //设置SDA �为输出
561 1 L0_IICMx_SCL(ch,0);
562 1
563 1 L0_IICMx_SDA(ch,0);
564 1
565 1 L0_IICMx_SCL(ch,1);
566 1 L0_IICMx_SCL(ch,0);
567 1 L0_IICMx_SDA(ch,1);
568 1 }
569
570 void L0_IICMx_NoAck(vtype ch)
571 { //设置SDA �为输出
572 1 L0_IICMx_SCL(ch,0);
573 1 L0_IICMx_SDA(ch,1);
574 1 L0_IICMx_SCL(ch,1);
575 1 L0_IICMx_SCL(ch,0);
576 1
577 1 }
578 /******
579 I2C总线标准规定： 应答�为0表示接收器应答 （ACK） ， 常常简记为A；
580 为1则表示�应答 （NACK） ，常简记为NA。
581 ��器��LSB之�，应当释放SDA线（拉高SDA） ，
582 以等待接收器产生应答�。
583 如果接收器在接收完最�一个字节的数�，
584 或者�能�接收更多的数�时，应当产生�应答信
585 ��通知��器。��器如果�现接收器产生了�应答状�，
586 则应当终止��。
587 // 检测 SDA是�回ACK
588 bit L0_I2C_Test_Ack(void)
589 { //设置SDA �为输入
590 bit ACK_Flag = 0;
591 L0_I2C_SCL(0);
592 L0_I2C_SDA(1);
593 L0_I2C_SCL(1);
594
595
596 if(IO_SDA = 0)
597 ACK_Flag = 1;
598 else
599 ACK_Flag = 0;
600 L0_I2C_SCL(0);
601 return ACK_Flag;
602 // return 1;// debug
603 }
604 *******/
605 //*************************************************
606 //字节��程�
607 //��c(�以是数�也�是地�)，�完�接收从应答
608 //�考虑从应答�
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 11
609 void L0_IICMx_SendData(vtype ch,unsigned char c )
610 {
611 1 unsigned char ack=8;
612 1 unsigned char BitCnt=8;//一字节8�
613 1 //设置SDA �为输出
614 1
615 1 for(BitCnt = 0;BitCnt < 8;BitCnt ++) //�传�的数�长度为8�
616 1 {
617 2 if((c << BitCnt ) & 0x80)
618 2 L0_IICMx_SDA(ch,1); //判断���
619 2 else
620 2 L0_IICMx_SDA(ch,0);
621 2 L0_IICMx_SCL(ch,1); //置时钟线为高，通知被控器开始接收数��
622 2 L0_IICMx_SCL(ch,0);
623 2 }//8clk
624 1
625 1 L0_IICMx_SDA(ch,1); //8���完�释放数�线，准备接收应答�
626 1 L0_IICMx_SDA_outin(ch,0);
627 1 L0_IICMx_SCL(ch,1);
628 1 ///gRccUs05 += L0_I2C_SDA_ask();
629 1 L0_IICMx_SCL(ch,0);
630 1
631 1 L0_IICMx_SDA_outin(ch,1);
632 1 //// L0_IICMx_delay(ts_iicm.t[ch]);
633 1 }
634 //**************************************************
635 //字节接收程�
636 //接收器件传�的数�，此程�应��|主应答函数|i2c_ack_main(void)使用
637 //return: uchar型1字节
638 unsigned char L0_IICMx_ReceiveData(vtype ch)
639 {
640 1 unsigned char BitCnt=8,IIC_RX_Data = 0;
641 1 L0_IICMx_SDA(ch,1); //读入数� 设置SDA �为输入
642 1 L0_IICMx_SDA_outin(ch,0);
643 1 for(BitCnt = 0;BitCnt<8;BitCnt++)
644 1 {
645 2 L0_IICMx_SCL(ch,0); //置时钟线为低，准备接收数��
646 2 L0_IICMx_SCL(ch,1); //置时钟线为高使数�线上数�有效
647 2 IIC_RX_Data = IIC_RX_Data << 1;
648 2 if(1 == L0_IICMx_SDA_get(ch))
649 2 IIC_RX_Data = IIC_RX_Data + 1; //读数��,接收的数��放入retc中
650 2 }// 8clk up
651 1 L0_IICMx_SCL(ch,0);
652 1 L0_IICMx_SDA_outin(ch,1);
653 1 return IIC_RX_Data;
654 1 }
655 /// 读� n个数� 放入p中
656 void L1_IICMx_ReadNByte(vtype ch,unsigned char Sal, unsigned char *p,unsigned char n)
657 {
658 1 unsigned char i;
659 1 L0_IICMx_Start(ch); // �动I2C
660 1 L0_IICMx_SendData(ch,(Sal)| 0x01); //��器件地�
661 1
662 1 for(i = 0;i < n-1;i ++) //读�字节数�
663 1 {
664 2 *(p + i) = L0_IICMx_ReceiveData(ch); //读�数�
665 2 ///printf("%x ",(int)(*(p + i)));
666 2
667 2 L0_IICMx_Ack(ch); //__/```\__
668 2 }
669 1 *(p + n - 1) = L0_IICMx_ReceiveData(ch);
670 1
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 12
671 1 L0_IICMx_NoAck(ch);
672 1 L0_IICMx_Stop(ch);
673 1 }
674
675 #if 0
主机从从设备读�多个字节
Master ST SAD+W SUB SR SAD+R MAK MAK NMAK SP
Slave SAK SAK SAK DATA DATA DATA
0x19
0001 1001
0011 001R
#endif
688
689 ///////////////////////////////
690 ///写入一个reg 为�续的写命令或者读��务
691 void L1_IICMx_WriteReg(vtype ch,unsigned char sla,unsigned char reg )
692 {
693 1 L0_IICMx_Start(ch); //�动I2C
694 1 L0_IICMx_SendData(ch,sla);//��器件地�
695 1 L0_IICMx_SendData(ch,reg);
696 1 }
697
698 ///写入一个 s+sla+reg
699 void L2_IICMx_Write1Reg(vtype ch,unsigned char sla,unsigned char reg )
700 {
701 1 L1_IICMx_WriteReg(ch,sla,reg);
702 1 L0_IICMx_Stop(ch);
703 1 }
704
705
706
707 // sla.(reg)=cmd
708 void L2_IICMx_WriteCmd(vtype ch,unsigned char sla,unsigned char reg,unsigned char cmd )
709 {
710 1 L1_IICMx_WriteReg(ch,sla,reg);
711 1 L0_IICMx_SendData(ch,cmd);
712 1 L0_IICMx_Stop(ch);
713 1 /*****************
714 1 if(gRccUs05 >0)///测试iic有效� �现没有结果
715 1 {
716 1 L0_uart0_uc(gRccUs05);gRccUs05 = 0;
717 1 }
718 1 ***************/
719 1 }
720
721 //读�reg地�的n个数� sla.(reg) sla.(reg+1)................ sla.(reg+n)
722 void L2_IICMx_ReadReg(vtype ch,unsigned char sla,unsigned char reg,
723 unsigned char *r,unsigned char n)
724 {
725 1 // U8 d[1];
726 1 //S ADD W A REG A
727 1 L1_IICMx_WriteReg(ch,sla,reg);
728 1 //S ADD R A D1 A D2 A.....DX N P
729 1 L1_IICMx_ReadNByte(ch,sla,r,n);
730 1 }
731
732 //读�reg地�的n个数� sla.(reg) sla.(reg+1)................ sla.(reg+n)
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 13
733 unsigned char L2_IICMx_Read1Reg1D(vtype ch,unsigned char sla,unsigned char reg)
734 {
735 1 U8 d;
736 1 // U8 d[1];
737 1 //S ADD W A REG A
738 1 L1_IICMx_WriteReg(ch,sla,reg);
739 1 //S ADD R A D1 A D2 A.....DX N P
740 1 L1_IICMx_ReadNByte(ch,sla,&d,1);
741 1 return d;
742 1 }
743
744
745
746
747 #if 0////��删除
///S 80H A Register Address A S 81H A Data NA P
void L2_tws_ReadReg000(unsigned char sla,unsigned char reg,
unsigned char *v)
{
unsigned char ack=8;
unsigned char BitCnt=8;//一字节8�
// U8 d[1];
//S ADD W A REG A
//// L1_I2C_WriteReg(sla,reg);
//step 1----
L0_I2C_Start(); //�动I2C
//step 2----L0_I2C_SendData(sla);//��器件地�
//设置SDA �为输出
for(BitCnt = 0;BitCnt < 8;BitCnt ++) //�传�的数�长度为8�
{
if((sla << BitCnt ) & 0x80)
L0_I2C_SDA(1); //判断���
else
L0_I2C_SDA(0);
L0_I2C_SCL(1); //置时钟线为高，通知被控器开始接收数��
L0_I2C_SCL(0);
}//8clk
L0_I2C_SDA(1); //8���完�释放数�线，准备接收应答�
L0_I2C_SCL(1);
L0_I2C_SCL(0);
//step 3---L0_I2C_SendData(reg);
for(BitCnt = 0;BitCnt < 8;BitCnt ++) //�传�的数�长度为8�
{
if((reg << BitCnt ) & 0x80)
L0_I2C_SDA(1); //判断���
else
L0_I2C_SDA(0);
L0_I2C_SCL(1); //置时钟线为高，通知被控器开始接收数��
L0_I2C_SCL(0);
}//8clk
L0_I2C_SDA(1); //8���完�释放数�线，准备接收应答�
L0_I2C_SCL(1);
L0_I2C_SCL(0);
//step 4----
L0_I2C_Start(); //�动I2C
//step 5---
//设置SDA �为输出
sla|=0x01;
for(BitCnt = 0;BitCnt < 8;BitCnt ++) //�传�的数�长度为8�
C51 COMPILER V9.54 MSP_IICMX 09/06/2024 11:24:46 PAGE 14
{
if((sla << BitCnt ) & 0x80)
L0_I2C_SDA(1); //判断���
else
L0_I2C_SDA(0);
L0_I2C_SCL(1); //置时钟线为高，通知被控器开始接收数��
L0_I2C_SCL(0);
}//8clk
L0_I2C_SDA(1); //8���完�释放数�线，准备接收应答�
L0_I2C_SCL(1);
L0_I2C_SCL(0);
//step 6---receive data
//设置SDA �为输出
*v = L0_I2C_ReceiveData();
L0_I2C_SCL(1);
L0_I2C_SCL(0);/// send NA
//step 7--- P
L0_I2C_Stop();
}
///S 80H A Register Address A S 81H A Data NA P
#endif
825
826
827
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 1471 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = 56 ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
EDATA SIZE = ---- ----
HDATA SIZE = ---- ----
XDATA CONST SIZE = ---- ----
FAR CONST SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 1 WARNING(S), 0 ERROR(S)