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ttss_weight/source/cpu/stc_only.H.bak

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//////////////////////////////////////////////////////////////////////////
/// COPYRIGHT NOTICE
/// Copyright (c) 2022, 传控科技
/// All rights reserved.
///
/// @file __STC_ONLY_H_
/// @brief macro define 和cpu相关，STC独有的 使用stc系列单片机是使用
/// 该文件和cpu的系列和型号有限关联 至少C51的标准寄存器应该是一致的
///（本文件实现的功能的详述)
///
/// @version 1.0 CCsens technology
/// @author CC
/// @date 20211226
/// @version 1.1 CCsens technology
/// @author CC
/// @date 20220626_7517 CCmodify
///增加了
//
//////////////////////////////////////////////////////////////////////////
#ifndef __STC_ONLY_H_
#define __STC_ONLY_H_
#include<intrins.h>
#define T3IF 0x02
///#define ES2 0x01
///#define ES3 0x08
#define S2TI BITN1
#define S2RI BITN0
#define S3TI BITN1
#define S3RI BITN0
#define S4TI BITN1
#define S4RI BITN0
///#define I2CTXD (*(unsigned char volatile xdata *)0xfE86)//423@ST8.PDF
///#define I2CRXD (*(unsigned char volatile xdata *)0xfE87)//423@ST8.PDF
#if 0
#define PWM5T1 (*(unsigned int volatile xdata *)0xff38)
#define PWM5T1H (*(unsigned char volatile xdata *)0xff38)
#define PWM5T1L (*(unsigned char volatile xdata *)0xff39)
///-------------------------------------
#define PWM5T2 (*(unsigned int volatile xdata *)0xff3a)
#define PWM5T2H (*(unsigned char volatile xdata *)0xff3a)
#define PWM5T2L (*(unsigned char volatile xdata *)0xff3b)
#define PWM5CR (*(unsigned char volatile xdata *)0xff3c)
#define PWM5HLD (*(unsigned char volatile xdata *)0xff3d)
#define PWM6T1 (*(unsigned int volatile xdata *)0xff40)
#define PWM6T1H (*(unsigned char volatile xdata *)0xff40)
#define PWM6T1L (*(unsigned char volatile xdata *)0xff41)
#define PWM6T2 (*(unsigned int volatile xdata *)0xff42)
#define PWM6T2H (*(unsigned char volatile xdata *)0xff42)
#define PWM6T2L (*(unsigned char volatile xdata *)0xff43)
#define PWM6CR (*(unsigned char volatile xdata *)0xff44)
#define PWM6HLD (*(unsigned char volatile xdata *)0xff45)
#define PWM7T1 (*(unsigned int volatile xdata *)0xff48)
#define PWM7T1H (*(unsigned char volatile xdata *)0xff48)
#define PWM7T1L (*(unsigned char volatile xdata *)0xff49)
#define PWM7T2 (*(unsigned int volatile xdata *)0xff4a)
#define PWM7T2H (*(unsigned char volatile xdata *)0xff4a)
#define PWM7T2L (*(unsigned char volatile xdata *)0xff4b)
#define gRccUs03 DMA_SPI_TXA///(*(unsigned short volatile data *)0xEC)//351@ST8.PDF CCAP0l CCAP1L EAH EBH
#define gRccUs01 PWM7T1////(*(unsigned short volatile data *)0xd2)//226@ST8.PDF T4H定时器4的高字节 D2H T4H定时器4的低字节 D3H
#define gRccUs02 PWM6T2////(*(unsigned short volatile data *)0xEA)//351@ST8.PDF CCAP0l CCAP1L EAH EBH
//#define gRccUs03 s_task_GC032A.n
#define gRccUs01_H PWM7T1H////(*(unsigned char volatile data *)0xd2)/// 定时器 4 计数寄存器（T4L，T4H）
#define gRccUs01_L PWM7T1L///(*(unsigned char volatile data *)0xd3)
////20221112_94813 CCmodify
///根据调整
#define gRccUs04 PWM5T2///(*(unsigned short volatile data *)0xFA)///351@ST8.PDF
#define gRccUs05 PWM5T1///(*(unsigned short volatile data *)0xFC)///351@ST8.PD CCAP2H
#define gRccUs01 PWM7T1////(*(unsigned short volatile data *)0xd2)//226@ST8.PDF T4H定时器4的高字节 D2H T4H定时器4的低字节 D3H
#define gRccUs02
#endif
#define gRccUs03 DMA_SPI_TXA///(*(unsigned short volatile data *)0xEC)//351@ST8.PDF CCAP0l CCAP1L EAH EBH
#define gRccUs01 PWM7T1////(*(unsigned short volatile data *)0xd2)//226@ST8.PDF T4H定时器4的高字节 D2H T4H定时器4的低字节 D3H
#define gRccUs02 PWM6T2
#define gRccUs05 PWM5T1
/////////////////////////////////////////////////
#ifdef docasdfasdf
符号 地址 B7 B6 B5 B4 B3 B2 B1 B0
IE2 AFH EUSB ET4 ET3 ES4 ES3 ET2 ESPI ES2
EUSB∶USB中断允许位。
0∶禁止 USB中断1∶允许 USB中断
ET4∶定时/计数器T4的溢出中断允许位。
0∶禁止 T4中断1∶允许T4中断
ET3∶定时/计数器 T3的溢出中断允许位。
0∶禁止 T3中断1∶允许T3中断
ES4∶串行口4中断允许位。
0∶禁止串行口4中断1∶允许串行口 4中断ES3∶串行口3中断允许位。
0∶禁止串行口3中断1∶允许串行口3中断
ET2∶定时/计数器 T2的溢出中断允许位。
0∶禁止T2中断1∶允许T3中断ESPI∶SPI中断允许位。
0∶禁止 SPI中断1∶允许 SPI中断
ES2∶串行口 2中断允许位。
0∶禁止串行口2中断1∶允许串行口2中断
#endif
/*******
#define ES4 BITN4
#define ES3 BITN3
#define ES2 BITN0
******/
/* P3 */
sbit RD = 0xB7;
sbit WR = 0xB6;
sbit T1 = 0xB5;
sbit T0 = 0xB4;
sbit INT1 = 0xB3;
sbit INT0 = 0xB2;
sbit TXD = 0xB1;
sbit RXD = 0xB0;
///sfr AUXINTIF = 0xef;
#define T2IF 0x01
/***
#define INT4IF BITN6
#define INT3IF BITN5
#define INT2IF BITN4
****/
//#define T4IF BITN2
//#define T3IF BITN1
//#define T2IF BITN0
/// >>>>> add by cc
#include "c_bit.h"
////端口内部4.1K上拉电阻控制位（注：P3.0和P3.1口上的上拉电阻可能会略小一些）
////0：禁止端口内部的 4.1K 上拉电阻 1：使能端口内部的 4.1K 上拉电阻
#define D_PHDR_P0(BITNx) P_SW2 |= 0x80;BITN_0(P0DR,BITNx);
#define D_PDR_P0(BITNx) P_SW2 |= 0x80;BITN_1(P0DR,BITNx);
#define D_PHDR_P1(BITNx) P_SW2 |= 0x80;BITN_0(P1DR,BITNx);
#define D_PDR_P1(BITNx) P_SW2 |= 0x80;BITN_1(P1DR,BITNx);
#define D_PUON_P0(BITNx) P_SW2 |= 0x80;BITN_1(P0PU,BITNx);
#define D_PUOFF_P0(BITNx) P_SW2 |= 0x80;BITN_0(P0PU,BITNx);
#define D_PUON_P1(BITNx) P_SW2 |= 0x80;BITN_1(P1PU,BITNx);
#define D_PUOFF_P1(BITNx) P_SW2 |= 0x80;BITN_0(P1PU,BITNx);
#define D_PUON_P2(BITNx) P_SW2 |= 0x80;BITN_1(P2PU,BITNx);
#define D_PUOFF_P2(BITNx) P_SW2 |= 0x80;BITN_0(P2PU,BITNx);
#define D_PUON_P3(BITNx) P_SW2 |= 0x80;BITN_1(P3PU,BITNx);
#define D_PUOFF_P3(BITNx) P_SW2 |= 0x80;BITN_0(P3PU,BITNx);
#define D_PUON_P4(BITNx) P_SW2 |= 0x80;BITN_1(P4PU,BITNx);
#define D_PUOFF_P4(BITNx) P_SW2 |= 0x80;BITN_0(P4PU,BITNx);
#define D_PUON_P5(BITNx) P_SW2 |= 0x80;BITN_1(P5PU,BITNx);
#define D_PUOFF_P5(BITNx) P_SW2 |= 0x80;BITN_0(P5PU,BITNx);
#define D_stdIO_P0_ALL() P0M1=0;P0M0=0;
#define D_HighI_P0_ALL() P0M1=0;P0M0=0XFF;
#define D_HighR_P0_ALL() P0M1=0XFF;P0M0=0;
#define D_OpenD_P0_ALL() P0M1=0XFF;P0M0=0XFF;
#define D_stdIO_P1_ALL() P1M1=0;P1M0=0;
#define D_HighI_P1_ALL() P1M1=0;P1M0=0XFF;
#define D_HighR_P1_ALL() P1M1=0XFF;P1M0=0;
#define D_OpenD_P1_ALL() P1M1=0XFF;P1M0=0XFF;
#define D_stdIO_P2_ALL() P2M1=0; P2M0=0;
#define D_HighI_P2_ALL() P2M1=0; P2M0=0XFF;
#define D_HighR_P2_ALL() P2M1=0XFF;P2M0=0;
#define D_OpenD_P2_ALL() P2M1=0XFF;P2M0=0XFF
#define D_stdIO_P3_ALL() P3M1=0; P3M0=0;
#define D_HighI_P3_ALL() P3M1=0; P3M0=0XFF;
#define D_HighR_P3_ALL() P3M1=0XFF;P3M0=0;
#define D_OpenD_P3_ALL() P3M1=0XFF;P3M0=0XFF
#define D_stdIO_P4_ALL() P4M1=0; P4M0=0;
#define D_HighI_P4_ALL() P4M1=0; P4M0=0XFF;
#define D_HighR_P4_ALL() P4M1=0XFF;P4M0=0;
#define D_OpenD_P4_ALL() P4M1=0XFF;P4M0=0XFF
#define D_stdIO_P5_ALL() P5M1=0; P5M0=0;
#define D_HighI_P5_ALL() P5M1=0; P5M0=0XFF;
#define D_HighR_P5_ALL() P5M1=0XFF;P5M0=0;
#define D_OpenD_P5_ALL() P5M1=0XFF;P5M0=0XFF;
#define D_stdIO_P0(BITNx) P_SW2 |= 0x80;BITN_0(P0M1,BITNx);BITN_0(P0M0,BITNx); //////00 准双向口 灌电流20mA 拉电流270-150uS
#define D_HighI_P0(BITNx) P_SW2 |= 0x80;BITN_0(P0M1,BITNx);BITN_1(P0M0,BITNx); //////01 推挽输出 20mA 加限流
#define D_HighR_P0(BITNx) P_SW2 |= 0x80;BITN_1(P0M1,BITNx);BITN_0(P0M0,BITNx); /////////10 高阻
#define D_OpenD_P0(BITNx) P_SW2 |= 0x80;BITN_1(P0M1,BITNx);BITN_1(P0M0,BITNx); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
#define D_stdIO_P1(BITNx) P_SW2 |= 0x80;BITN_0(P1M1,BITNx);BITN_0(P1M0,BITNx); //////00 准双向口 灌电流20mA 拉电流270-150uS
#define D_HighI_P1(BITNx) P_SW2 |= 0x80;BITN_0(P1M1,BITNx);BITN_1(P1M0,BITNx); //////01 推挽输出 20mA 加限流
#define D_HighR_P1(BITNx) P_SW2 |= 0x80;BITN_1(P1M1,BITNx);BITN_0(P1M0,BITNx); /////////10 高阻
#define D_OpenD_P1(BITNx) P_SW2 |= 0x80;BITN_1(P1M1,BITNx);BITN_1(P1M0,BITNx); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
#define D_stdIO_P2(BITNx) P_SW2 |= 0x80;BITN_0(P2M1,BITNx);BITN_0(P2M0,BITNx); //////00 准双向口 灌电流20mA 拉电流270-150uS
#define D_HighI_P2(BITNx) P_SW2 |= 0x80;BITN_0(P2M1,BITNx);BITN_1(P2M0,BITNx); //////01 推挽输出 20mA 加限流
#define D_HighR_P2(BITNx) P_SW2 |= 0x80;BITN_1(P2M1,BITNx);BITN_0(P2M0,BITNx); /////////10 高阻
#define D_OpenD_P2(BITNx) P_SW2 |= 0x80;BITN_1(P2M1,BITNx);BITN_1(P2M0,BITNx); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
#define D_stdIO_P3(BITNx) P_SW2 |= 0x80;BITN_0(P3M1,BITNx);BITN_0(P3M0,BITNx); //////00 准双向口 灌电流20mA 拉电流270-150uS
#define D_HighI_P3(BITNx) P_SW2 |= 0x80;BITN_0(P3M1,BITNx);BITN_1(P3M0,BITNx); //////01 推挽输出 20mA 加限流
#define D_HighR_P3(BITNx) P_SW2 |= 0x80;BITN_1(P3M1,BITNx);BITN_0(P3M0,BITNx); /////////10 高阻
#define D_OpenD_P3(BITNx) P_SW2 |= 0x80;BITN_1(P3M1,BITNx);BITN_1(P3M0,BITNx); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
#define D_stdIO_P4(BITNx) P_SW2 |= 0x80;BITN_0(P4M1,BITNx);BITN_0(P4M0,BITNx); //////00 准双向口 灌电流20mA 拉电流270-150uS
#define D_HighI_P4(BITNx) P_SW2 |= 0x80;BITN_0(P4M1,BITNx);BITN_1(P4M0,BITNx); //////01 推挽输出 20mA 加限流
#define D_HighR_P4(BITNx) P_SW2 |= 0x80;BITN_1(P4M1,BITNx);BITN_0(P4M0,BITNx); /////////10 高阻
#define D_OpenD_P4(BITNx) P_SW2 |= 0x80;BITN_1(P4M1,BITNx);BITN_1(P4M0,BITNx); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
#define D_stdIO_P5(BITNx) P_SW2 |= 0x80;BITN_0(P5M1,BITNx);BITN_0(P5M0,BITNx); //////00 准双向口 灌电流20mA 拉电流270-150uS
#define D_HighI_P5(BITNx) P_SW2 |= 0x80;BITN_0(P5M1,BITNx);BITN_1(P5M0,BITNx); //////01 推挽输出 20mA 加限流
#define D_HighR_P5(BITNx) P_SW2 |= 0x80;BITN_1(P5M1,BITNx);BITN_0(P5M0,BITNx); /////////10 高阻
#define D_OpenD_P5(BITNx) P_SW2 |= 0x80;BITN_1(P5M1,BITNx);BITN_1(P5M0,BITNx); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
#define D_stdIO_P6(BITNx) P_SW2 |= 0x80;BITN_0(P6M1,BITNx);BITN_0(P6M0,BITNx); //////00 准双向口 灌电流20mA 拉电流270-150uS
#define D_HighI_P6(BITNx) P_SW2 |= 0x80;BITN_0(P6M1,BITNx);BITN_1(P6M0,BITNx); //////01 推挽输出 20mA 加限流
#define D_HighR_P6(BITNx) P_SW2 |= 0x80;BITN_1(P6M1,BITNx);BITN_0(P6M0,BITNx); /////////10 高阻
#define D_OpenD_P6(BITNx) P_SW2 |= 0x80;BITN_1(P6M1,BITNx);BITN_1(P6M0,BITNx); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
#define D_stdIO_P7(BITNx) P_SW2 |= 0x80;BITN_0(P7M1,BITNx);BITN_0(P7M0,BITNx); //////00 准双向口 灌电流20mA 拉电流270-150uS
#define D_HighI_P7(BITNx) P_SW2 |= 0x80;BITN_0(P7M1,BITNx);BITN_1(P7M0,BITNx); //////01 推挽输出 20mA 加限流
#define D_HighR_P7(BITNx) P_SW2 |= 0x80;BITN_1(P7M1,BITNx);BITN_0(P7M0,BITNx); /////////10 高阻
#define D_OpenD_P7(BITNx) P_SW2 |= 0x80;BITN_1(P7M1,BITNx);BITN_1(P7M0,BITNx); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
/***
#define P0_conf_in(n) BITN_1(P0M1,n);BITN_0(P0M0,n);
#define P1_conf_in(n) BITN_1(P1M1,n);BITN_0(P1M0,n);
#define P2_conf_in(n) BITN_1(P2M1,n);BITN_0(P2M0,n);
#define P2_conf_port(n) BITN_0(P2M1,n);BITN_0(P2M0,n);
#define P3_conf_in(n) BITN_1(P3M1,n);BITN_0(P3M0,n);
#define P3_conf_port(n) BITN_0(P3M1,n);BITN_0(P3M0,n);
#define P4_conf_in(n) BITN_1(P4M1,n);BITN_0(P4M0,n);
#define P5_conf_in(n) BITN_1(P5M1,n);BITN_0(P5M0,n);
***/
////#define NOP() _nop_()
#define L0_INT4_OPEN() BITN_1(INT_CLKO, INT_EX4)
#define L0_INT4_CLOSE() BITN_0(INT_CLKO, INT_EX4)
#define L0_INT4_AT() BITN_G(INT_CLKO, INT_EX4)
#define L0_INT4_CLEAR() BITN_0(AUXINTIF, INT4IF)
#define L0_INT3_CLEAR() BITN_0(AUXINTIF, INT3IF)
#define L0_INT2_CLEAR() BITN_0(AUXINTIF, INT2IF)
//////
#define L0_INT3_OPEN() BITN_1(INT_CLKO, INT_EX3);
#define L0_INT3_CLOSE() BITN_0(INT_CLKO, INT_EX3);
#define L0_INT2_OPEN() BITN_1(INT_CLKO, INT_EX2);
#define L0_INT2_CLOSE() BITN_0(INT_CLKO, INT_EX2);
#define L0_INT1_OPEN() EX1 = 1;
#define L0_INT1_CLOSE() EX1 = 0;
#define L0_INT0_OPEN() EX0 = 1;
#define L0_INT0_CLOSE() EX0 = 0;
#if 0
#define L0_TIMER1_start() TR1 = 1;
#define L0_TIMER1_end() TR1 = 0;
#define L0_TIMER1_isr_OPEN() ET1 = 1;
#define L0_TIMER1_isr_CLOSE() ET1 = 0;
#else
#define L0_TIMER1_start() ET1 = 1;
#define L0_TIMER1_end() ET1 = 0;
#define L0_TIMER1_isr_OPEN() TR1 = 1;
#define L0_TIMER1_isr_CLOSE() TR1 = 0;
#endif
/// fixme 颠倒定义会让c51锁死#define _nop_() NOP()
///#define L0_INT3_OPEN() BITN_1(INT_CLKO,INT_EX3); //使能INT3中断
///#define L0_INT3_CLOSE() BITN_0(INT_CLKO,INT_EX3);
#define D_P07_IN() D_OpenD_P0(BITN7)
#define D_P06_IN() D_OpenD_P0(BITN6)
#define D_P05_IN() D_OpenD_P0(BITN5)
#define D_P04_IN() D_OpenD_P0(BITN4)
#define D_P03_IN() D_OpenD_P0(BITN3)
#define D_P02_IN() D_OpenD_P0(BITN2)
#define D_P01_IN() D_OpenD_P0(BITN1)
#define D_P00_IN() D_OpenD_P0(BITN0)
#define D_P07_OUT() D_stdIO_P0(BITN7)
#define D_P06_OUT() D_stdIO_P0(BITN6)
#define D_P05_OUT() D_stdIO_P0(BITN5)
#define D_P04_OUT() D_stdIO_P0(BITN4)
#define D_P03_OUT() D_stdIO_P0(BITN3)
#define D_P02_OUT() D_stdIO_P0(BITN2)
#define D_P01_OUT() D_stdIO_P0(BITN1)
#define D_P00_OUT() D_stdIO_P0(BITN0)
#define D_P17_IN() D_OpenD_P1(BITN7)
#define D_P16_IN() D_OpenD_P1(BITN6)
#define D_P15_IN() D_OpenD_P1(BITN5)
#define D_P14_IN() D_OpenD_P1(BITN4)
#define D_P13_IN() D_OpenD_P1(BITN3)
#define D_P12_IN() D_OpenD_P1(BITN2)
#define D_P11_IN() D_OpenD_P1(BITN1)
#define D_P10_IN() D_OpenD_P1(BITN0)
#define D_P17_OUT() D_stdIO_P1(BITN7)
#define D_P16_OUT() D_stdIO_P1(BITN6)
#define D_P15_OUT() D_stdIO_P1(BITN5)
#define D_P14_OUT() D_stdIO_P1(BITN4)
#define D_P13_OUT() D_stdIO_P1(BITN3)
#define D_P12_OUT() D_stdIO_P1(BITN2)
#define D_P11_OUT() D_stdIO_P1(BITN1)
#define D_P10_OUT() D_stdIO_P1(BITN0)
#define D_P27_IN() D_OpenD_P2(BITN7)
#define D_P26_IN() D_OpenD_P2(BITN6)
#define D_P25_IN() D_OpenD_P2(BITN5)
#define D_P24_IN() D_OpenD_P2(BITN4)
#define D_P23_IN() D_OpenD_P2(BITN3)
#define D_P22_IN() D_OpenD_P2(BITN2)
#define D_P21_IN() D_OpenD_P2(BITN1)
#define D_P20_IN() D_OpenD_P2(BITN0)
#define D_P27_OUT() D_stdIO_P2(BITN7)
#define D_P26_OUT() D_stdIO_P2(BITN6)
#define D_P25_OUT() D_stdIO_P2(BITN5)
#define D_P24_OUT() D_stdIO_P2(BITN4)
#define D_P23_OUT() D_stdIO_P2(BITN3)
#define D_P22_OUT() D_stdIO_P2(BITN2)
#define D_P21_OUT() D_stdIO_P2(BITN1)
#define D_P20_OUT() D_stdIO_P2(BITN0)
#define D_P37_IN() D_OpenD_P3(BITN7)
#define D_P36_IN() D_OpenD_P3(BITN6)
#define D_P35_IN() D_OpenD_P3(BITN5)
#define D_P34_IN() D_OpenD_P3(BITN4)
#define D_P33_IN() D_OpenD_P3(BITN3)
#define D_P32_IN() D_OpenD_P3(BITN2)
#define D_P31_IN() D_OpenD_P3(BITN1)
#define D_P30_IN() D_OpenD_P3(BITN0)
#define D_P37_OUT() D_stdIO_P3(BITN7)
#define D_P36_OUT() D_stdIO_P3(BITN6)
#define D_P35_OUT() D_stdIO_P3(BITN5)
#define D_P34_OUT() D_stdIO_P3(BITN4)
#define D_P33_OUT() D_stdIO_P3(BITN3)
#define D_P32_OUT() D_stdIO_P3(BITN2)
#define D_P31_OUT() D_stdIO_P3(BITN1)
#define D_P30_OUT() D_stdIO_P3(BITN0)
#define D_P47_IN() D_OpenD_P4(BITN7)
#define D_P46_IN() D_OpenD_P4(BITN6)
#define D_P45_IN() D_OpenD_P4(BITN5)
#define D_P44_IN() D_OpenD_P4(BITN4)
#define D_P43_IN() D_OpenD_P4(BITN3)
#define D_P42_IN() D_OpenD_P4(BITN2)
#define D_P41_IN() D_OpenD_P4(BITN1) /// D_opend_P4(BITN1)
#define D_P40_IN() D_OpenD_P4(BITN0)
#define D_P47_OUT() D_stdIO_P4(BITN7)
#define D_P46_OUT() D_stdIO_P4(BITN6)
#define D_P45_OUT() D_stdIO_P4(BITN5)
#define D_P44_OUT() D_stdIO_P4(BITN4)
#define D_P43_OUT() D_stdIO_P4(BITN3)
#define D_P42_OUT() D_stdIO_P4(BITN2)
#define D_P41_OUT() D_stdIO_P4(BITN1)
#define D_P40_OUT() D_stdIO_P4(BITN0)
#define D_P57_IN() D_OpenD_P5(BITN7)
#define D_P56_IN() D_OpenD_P5(BITN6)
#define D_P55_IN() D_OpenD_P5(BITN5)
#define D_P54_IN() D_OpenD_P5(BITN4)
#define D_P53_IN() D_OpenD_P5(BITN3)
#define D_P52_IN() D_OpenD_P5(BITN2)
#define D_P51_IN() D_OpenD_P5(BITN1)
#define D_P50_IN() D_OpenD_P5(BITN0)
#define D_P57_OUT() D_stdIO_P5(BITN7)
#define D_P56_OUT() D_stdIO_P5(BITN6)
#define D_P55_OUT() D_stdIO_P5(BITN5)
#define D_P54_OUT() D_stdIO_P5(BITN4)
#define D_P53_OUT() D_stdIO_P5(BITN3)
#define D_P52_OUT() D_stdIO_P5(BITN2)
#define D_P51_OUT() D_stdIO_P5(BITN1)
#define D_P50_OUT() D_stdIO_P5(BITN0)
#define D_P67_IN() D_OpenD_P6(BITN7)
#define D_P66_IN() D_OpenD_P6(BITN6)
#define D_P65_IN() D_OpenD_P6(BITN5)
#define D_P64_IN() D_OpenD_P6(BITN4)
#define D_P63_IN() D_OpenD_P6(BITN3)
#define D_P62_IN() D_OpenD_P6(BITN2)
#define D_P61_IN() D_OpenD_P6(BITN1)
#define D_P60_IN() D_OpenD_P6(BITN0)
#define D_P67_OUT() D_stdIO_P6(BITN7)
#define D_P66_OUT() D_stdIO_P6(BITN6)
#define D_P65_OUT() D_stdIO_P6(BITN5)
#define D_P64_OUT() D_stdIO_P6(BITN4)
#define D_P63_OUT() D_stdIO_P6(BITN3)
#define D_P62_OUT() D_stdIO_P6(BITN2)
#define D_P61_OUT() D_stdIO_P6(BITN1)
#define D_P60_OUT() D_stdIO_P6(BITN0)
#define D_SERVE_INT0 interrupt INT0_VECTOR /// 01 00
#define D_SERVE_TIMER0 interrupt TMR0_VECTOR /// 02 01
#define D_SERVE_INT1 interrupt INT1_VECTOR /// 03 02
#define D_SERVE_TIMER1 interrupt TMR1_VECTOR /// 04 03
#define D_SERVE_UART interrupt UART1_VECTOR /// 05 04
#define D_SERVE_ADC interrupt ADC_VECTOR /// 06 05
#define D_SERVE_LVD interrupt LVD_VECTOR /// 07 06
#define D_SERVE_PCA interrupt PCA_VECTOR /// 08 07
#define D_SERVE_UART2 interrupt UART2_VECTOR /// 09 08
#define D_SERVE_SPI interrupt SPI_VECTOR /// 10 09
#define D_SERVE_INT2 interrupt INT2_VECTOR /// 11 10
#define D_SERVE_INT3 interrupt INT3_VECTOR /// 12 11
#define D_SERVE_TIMER2 interrupt TMR2_VECTOR /// 13 12
#define D_SERVE_INT4 interrupt INT4_VECTOR /// 14 13
#define D_SERVE_UART3 interrupt UART3_VECTOR /// 15 14
#define D_SERVE_UART4 interrupt UART4_VECTOR /// 16 15
#define D_SERVE_TIMER3 interrupt TMR3_VECTOR /// 17 16
#define D_SERVE_TIMER4 interrupt TMR4_VECTOR /// 18 17
#define D_SERVE_CMP interrupt CMP_VECTOR /// 19 18
#define D_SERVE_PWM interrupt PWM_VECTOR /// 20 19
#define D_SERVE_PWMFD interrupt PWMFD_VECTOR /// 21 20
#define D_SERVE_I2C interrupt I2C_VECTOR /// 22 21
#define D_SERVE_P0INT interrupt P0INT_VECTOR /// 24 23
#define D_SERVE_P1INT interrupt P1INT_VECTOR /// 25 24
#define D_SERVE_P2INT interrupt P2INT_VECTOR /// 26 25
#define D_SERVE_P3INT interrupt P3INT_VECTOR /// 27 26
#define D_SERVE_P4INT interrupt P4INT_VECTOR /// 28 27
#define D_SERVE_P5INT interrupt P5INT_VECTOR /// 29 28
#define D_SERVE_P6INT interrupt P6INT_VECTOR /// 30 29
#define D_SERVE_P7INT interrupt P7INT_VECTOR /// 31 30
#define D_SERVE_M2MDMA interrupt M2MDMA_VECTOR /// 32 31
#define D_SERVE_ADCDMA interrupt ADCDMA_VECTOR /// 33 32
#define D_SERVE_SPIDMA interrupt SPIDMA_VECTOR /// 34 33
#define D_SERVE_U1TXDMA interrupt U1TXDMA_VECTOR /// 35 34
#define D_SERVE_U1RXDMA interrupt U1RXDMA_VECTOR /// 36 35
#define D_SERVE_U2TXDMA interrupt U2TXDMA_VECTOR /// 37 36
#define D_SERVE_U2RXDMA interrupt U2RXDMA_VECTOR /// 38 37
#define D_SERVE_U3TXDMA interrupt U3TXDMA_VECTOR /// 39 38
#define D_SERVE_U3RXDMA interrupt U3RXDMA_VECTOR /// 40 39
#define D_SERVE_U4TXDMA interrupt U4TXDMA_VECTOR /// 41 40
#define D_SERVE_U4RXDMA interrupt U4RXDMA_VECTOR /// 42 41
#define D_SERVE_LCMDMA interrupt LCMDMA_VECTOR /// 43 42
#define D_SERVE_LCM interrupt LCM_VECTOR /// 44 43
#endif //__STC_ONLY_H_