34 changed files with 1056 additions and 4024 deletions
@ -1,589 +0,0 @@ |
|||
#ifndef __STC_stc8a8k_H_ |
|||
#define __STC_stc8a8k_H_ |
|||
// STC_stc8a8k.h
|
|||
#include<intrins.h> |
|||
|
|||
/////////////////////////////////////////////////
|
|||
//注意: STC15W4K32S4系列的芯片,上电后所有与PWM相关的IO口均为
|
|||
// 高阻态,需将这些口设置为准双向口或强推挽模式方可正常使用
|
|||
//相关IO: P0.6/P0.7/P1.6/P1.7/P2.1/P2.2
|
|||
// P2.3/P2.7/P3.7/P4.2/P4.4/P4.5
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
//包含本头文件后,不用另外再包含"REG51.H"
|
|||
|
|||
//内核特殊功能寄存器 // 复位值 描述
|
|||
sfr ACC = 0xE0; //0000,0000 累加器Accumulator
|
|||
sfr B = 0xF0; //0000,0000 B寄存器
|
|||
sfr PSW = 0xD0; //0000,0000 程序状态字
|
|||
sbit CY = PSW^7; |
|||
sbit AC = PSW^6; |
|||
sbit F0 = PSW^5; |
|||
sbit RS1 = PSW^4; |
|||
sbit RS0 = PSW^3; |
|||
sbit OV = PSW^2; |
|||
sbit P = PSW^0; |
|||
sfr SP = 0x81; //0000,0111 堆栈指针
|
|||
sfr DPL = 0x82; //0000,0000 数据指针低字节
|
|||
sfr DPH = 0x83; //0000,0000 数据指针高字节
|
|||
|
|||
//I/O 口特殊功能寄存器
|
|||
sfr P0 = 0x80; //1111,1111 端口0
|
|||
sbit P00 = P0^0; |
|||
sbit P01 = P0^1; |
|||
sbit P02 = P0^2; |
|||
sbit P03 = P0^3; |
|||
sbit P04 = P0^4; |
|||
sbit P05 = P0^5; |
|||
sbit P06 = P0^6; |
|||
sbit P07 = P0^7; |
|||
sfr P1 = 0x90; //1111,1111 端口1
|
|||
sbit P10 = P1^0; |
|||
sbit P11 = P1^1; |
|||
sbit P12 = P1^2; |
|||
sbit P13 = P1^3; |
|||
sbit P14 = P1^4; |
|||
sbit P15 = P1^5; |
|||
sbit P16 = P1^6; |
|||
sbit P17 = P1^7; |
|||
sfr P2 = 0xA0; //1111,1111 端口2
|
|||
sbit P20 = P2^0; |
|||
sbit P21 = P2^1; |
|||
sbit P22 = P2^2; |
|||
sbit P23 = P2^3; |
|||
sbit P24 = P2^4; |
|||
sbit P25 = P2^5; |
|||
sbit P26 = P2^6; |
|||
sbit P27 = P2^7; |
|||
sfr P3 = 0xB0; //1111,1111 端口3
|
|||
sbit P30 = P3^0; |
|||
sbit P31 = P3^1; |
|||
sbit P32 = P3^2; |
|||
sbit P33 = P3^3; |
|||
sbit P34 = P3^4; |
|||
sbit P35 = P3^5; |
|||
sbit P36 = P3^6; |
|||
sbit P37 = P3^7; |
|||
sfr P4 = 0xC0; //1111,1111 端口4
|
|||
sbit P40 = P4^0; |
|||
sbit P41 = P4^1; |
|||
sbit P42 = P4^2; |
|||
sbit P43 = P4^3; |
|||
sbit P44 = P4^4; |
|||
sbit P45 = P4^5; |
|||
sbit P46 = P4^6; |
|||
sbit P47 = P4^7; |
|||
sfr P5 = 0xC8; //xxxx,1111 端口5
|
|||
sbit P50 = P5^0; |
|||
sbit P51 = P5^1; |
|||
sbit P52 = P5^2; |
|||
sbit P53 = P5^3; |
|||
sbit P54 = P5^4; |
|||
sbit P55 = P5^5; |
|||
sbit P56 = P5^6; |
|||
sbit P57 = P5^7; |
|||
sfr P6 = 0xE8; //0000,0000 端口6
|
|||
sbit P60 = P6^0; |
|||
sbit P61 = P6^1; |
|||
sbit P62 = P6^2; |
|||
sbit P63 = P6^3; |
|||
sbit P64 = P6^4; |
|||
sbit P65 = P6^5; |
|||
sbit P66 = P6^6; |
|||
sbit P67 = P6^7; |
|||
sfr P7 = 0xF8; //0000,0000 端口7
|
|||
sbit P70 = P7^0; |
|||
sbit P71 = P7^1; |
|||
sbit P72 = P7^2; |
|||
sbit P73 = P7^3; |
|||
sbit P74 = P7^4; |
|||
sbit P75 = P7^5; |
|||
sbit P76 = P7^6; |
|||
sbit P77 = P7^7; |
|||
|
|||
|
|||
///00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
///01 推挽输出 20mA 加限流
|
|||
///10 高阻
|
|||
///11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
|
|||
sfr P0M0 = 0x94; //0000,0000 端口0模式寄存器0
|
|||
sfr P0M1 = 0x93; //0000,0000 端口0模式寄存器1
|
|||
sfr P1M0 = 0x92; //0000,0000 端口1模式寄存器0
|
|||
sfr P1M1 = 0x91; //0000,0000 端口1模式寄存器1
|
|||
sfr P2M0 = 0x96; //0000,0000 端口2模式寄存器0
|
|||
sfr P2M1 = 0x95; //0000,0000 端口2模式寄存器1
|
|||
sfr P3M0 = 0xB2; //0000,0000 端口3模式寄存器0
|
|||
sfr P3M1 = 0xB1; //0000,0000 端口3模式寄存器1
|
|||
sfr P4M0 = 0xB4; //0000,0000 端口4模式寄存器0
|
|||
sfr P4M1 = 0xB3; //0000,0000 端口4模式寄存器1
|
|||
sfr P5M0 = 0xCA; //0000,0000 端口5模式寄存器0
|
|||
sfr P5M1 = 0xC9; //0000,0000 端口5模式寄存器1
|
|||
sfr P6M0 = 0xCC; //0000,0000 端口6模式寄存器0
|
|||
sfr P6M1 = 0xCB; //0000,0000 端口6模式寄存器1
|
|||
sfr P7M0 = 0xE2; //0000,0000 端口7模式寄存器0
|
|||
sfr P7M1 = 0xE1; //0000,0000 端口7模式寄存器1
|
|||
|
|||
//系统管理特殊功能寄存器
|
|||
sfr PCON = 0x87; //0001,0000 电源控制寄存器
|
|||
sfr AUXR = 0x8E; //0000,0000 辅助寄存器
|
|||
|
|||
#define TOx12 BITN7 |
|||
#define T1x12 BITN6 |
|||
#define UART_M0x6 BITN5 //串口1模式0速度 =0 12倍 = 1 两倍
|
|||
#define T2R BITN4 //定时器2 运行 =1
|
|||
#define T2_C BITN3 //定时器/计数器选择
|
|||
#define T2x12 BITN2 |
|||
#define EXTRAM BITN1 |
|||
#define S1ST2 BITN0 //串口1选择定时器1 =0 选择定时器2 =1
|
|||
|
|||
|
|||
|
|||
|
|||
sfr AUXR1 = 0xA2; //0000,0000 辅助寄存器1
|
|||
sfr P_SW1 = 0xA2; //0000,0000 外设端口切换寄存器1
|
|||
sfr CLK_DIV = 0x97; //0000,0000 时钟分频控制寄存器
|
|||
sfr BUS_SPEED = 0xA1; //xx10,x011 总线速度控制寄存器
|
|||
sfr P1ASF = 0x9D; //0000,0000 端口1模拟功能配置寄存器
|
|||
//-----------------------------------------------------------------
|
|||
sfr P_SW2 = 0xBA; //0xxx,x000 外设端口切换寄存器
|
|||
#define EAXFR BITN7 |
|||
#define I2C_S1 BITN5 |
|||
#define I2C_S2 BITN4 |
|||
#define CMPO_S BITN3 |
|||
#define S4_S BITN2 |
|||
#define S3_S BITN1 |
|||
#define S2_S BITN0 |
|||
|
|||
//-----------------------------------------------------------------
|
|||
|
|||
//中断特殊功能寄存器
|
|||
sfr IE = 0xA8; //0000,0000 中断控制寄存器
|
|||
sbit EA = IE^7; |
|||
sbit ELVD = IE^6; |
|||
sbit EADC = IE^5; |
|||
sbit ES = IE^4; |
|||
sbit ET1 = IE^3; |
|||
sbit EX1 = IE^2; |
|||
sbit ET0 = IE^1; |
|||
sbit EX0 = IE^0; |
|||
sfr IP = 0xB8; //0000,0000 中断优先级寄存器
|
|||
sbit PPCA = IP^7; |
|||
sbit PLVD = IP^6; |
|||
sbit PADC = IP^5; |
|||
sbit PS = IP^4; |
|||
sbit PT1 = IP^3; |
|||
sbit PX1 = IP^2; |
|||
sbit PT0 = IP^1; |
|||
sbit PX0 = IP^0; |
|||
sfr IE2 = 0xAF; //0000,0000 中断控制寄存器2
|
|||
/// 不可位寻址
|
|||
#define ET4 BITN6 |
|||
#define ET3 BITN5 |
|||
#define ES4 BITN4 |
|||
#define ES3 BITN3 |
|||
#define ET2 BITN2 |
|||
#define ESPI BITN1 |
|||
#define ES2 BITN0 |
|||
|
|||
sfr IP2 = 0xB5; //xxxx,xx00 中断优先级寄存器2
|
|||
sfr INT_CLKO = 0x8F; //0000,0000 外部中断与时钟输出控制寄存器
|
|||
|
|||
//定时器特殊功能寄存器
|
|||
sfr TCON = 0x88; //0000,0000 T0/T1控制寄存器
|
|||
sbit TF1 = TCON^7; |
|||
sbit TR1 = TCON^6; |
|||
sbit TF0 = TCON^5; |
|||
sbit TR0 = TCON^4; |
|||
sbit IE1 = TCON^3; |
|||
sbit IT1 = TCON^2; |
|||
sbit IE0 = TCON^1; |
|||
sbit IT0 = TCON^0; |
|||
sfr TMOD = 0x89; //0000,0000 T0/T1模式寄存器
|
|||
sfr TL0 = 0x8A; //0000,0000 T0低字节
|
|||
sfr TL1 = 0x8B; //0000,0000 T1低字节
|
|||
sfr TH0 = 0x8C; //0000,0000 T0高字节
|
|||
sfr TH1 = 0x8D; //0000,0000 T1高字节
|
|||
sfr T4T3M = 0xD1; //0000,0000 T3/T4模式寄存器
|
|||
sfr T3T4M = 0xD1; //0000,0000 T3/T4模式寄存器
|
|||
sfr T4H = 0xD2; //0000,0000 T4高字节
|
|||
sfr T4L = 0xD3; //0000,0000 T4低字节
|
|||
sfr T3H = 0xD4; //0000,0000 T3高字节
|
|||
sfr T3L = 0xD5; //0000,0000 T3低字节
|
|||
sfr T2H = 0xD6; //0000,0000 T2高字节
|
|||
sfr T2L = 0xD7; //0000,0000 T2低字节
|
|||
sfr WKTCL = 0xAA; //0000,0000 掉电唤醒定时器低字节
|
|||
sfr WKTCH = 0xAB; //0000,0000 掉电唤醒定时器高字节
|
|||
sfr WDT_CONTR = 0xC1; //0000,0000 看门狗控制寄存器
|
|||
|
|||
//串行口特殊功能寄存器
|
|||
sfr SCON = 0x98; //0000,0000 串口1控制寄存器
|
|||
sbit SM0 = SCON^7; |
|||
sbit SM1 = SCON^6; |
|||
sbit SM2 = SCON^5; |
|||
sbit REN = SCON^4; |
|||
sbit TB8 = SCON^3; |
|||
sbit RB8 = SCON^2; |
|||
sbit TI = SCON^1; |
|||
sbit RI = SCON^0; |
|||
//sfr SBUF = 0x99; //xxxx,xxxx 串口1数据寄存器
|
|||
//sfr S2CON = 0x9A; //0000,0000 串口2控制寄存器
|
|||
//sfr S2BUF = 0x9B; //xxxx,xxxx 串口2数据寄存器
|
|||
//sfr SADDR = 0xA9; //0000,0000 从机地址寄存器
|
|||
//sfr SADEN = 0xB9; //0000,0000 从机地址屏蔽寄存器
|
|||
|
|||
sfr SBUF = 0x99; //Serial Data Buffer
|
|||
sfr SBUF0 = 0x99; //Serial Data Buffer xxxx,xxxx
|
|||
sfr SADEN = 0xB9; //Slave Address Mask 0000,0000
|
|||
sfr SADDR = 0xA9; //Slave Address 0000,0000
|
|||
//-----------------------------------
|
|||
// 7 6 5 4 3 2 1 0 Reset Value
|
|||
sfr S2CON = 0x9A; //S2 Control S2SM0 S2SM1 S2SM2 S2REN S2TB8 S2RB8 S2TI S2RI 00000000B
|
|||
#define S2SM0 BITN7 |
|||
#define S2ST4 BITN6 |
|||
#define S2SM2 BITN5 |
|||
#define S2REN BITN4 |
|||
#define S2TB8 BITN3 |
|||
#define S2RB8 BITN2 |
|||
#define S2TI BITN1 |
|||
#define S2RI BITN0 |
|||
|
|||
sfr S2BUF = 0x9B; //S2 Serial Buffer xxxx,xxxx
|
|||
//sfr BRT = 0x9C; //S2 Baud-Rate Timer 0000,0000
|
|||
|
|||
//---------------------------------------------------------------
|
|||
sfr S3CON = 0xAC; //0000,0000 串口3控制寄存器
|
|||
#define S3SM0 BITN7 |
|||
#define S3ST4 BITN6 |
|||
#define S3SM2 BITN5 |
|||
#define S3REN BITN4 |
|||
#define S3TB8 BITN3 |
|||
#define S3RB8 BITN2 |
|||
#define S3TI BITN1 |
|||
#define S3RI BITN0 |
|||
|
|||
sfr S3BUF = 0xAD; //xxxx,xxxx 串口3数据寄存器
|
|||
//---------------------------------------------------------------
|
|||
sfr S4CON = 0x84; //0000,0000 串口4控制寄存器
|
|||
#define S4SM0 BITN7 |
|||
#define S4ST4 BITN6 |
|||
#define S4SM2 BITN5 |
|||
#define S4REN BITN4 |
|||
#define S4TB8 BITN3 |
|||
#define S4RB8 BITN2 |
|||
#define S4TI BITN1 |
|||
#define S4RI BITN0 |
|||
|
|||
sfr S4BUF = 0x85; //xxxx,xxxx 串口4数据寄存器
|
|||
|
|||
//ADC 特殊功能寄存器
|
|||
sfr ADC_CONTR = 0xBC; //0000,0000 A/D转换控制寄存器
|
|||
sfr ADC_RES = 0xBD; //0000,0000 A/D转换结果高8位
|
|||
sfr ADC_RESL = 0xBE; //0000,0000 A/D转换结果低2位
|
|||
|
|||
//SPI 特殊功能寄存器
|
|||
sfr SPSTAT = 0xCD; //00xx,xxxx SPI状态寄存器
|
|||
sfr SPCTL = 0xCE; //0000,0100 SPI控制寄存器
|
|||
sfr SPDAT = 0xCF; //0000,0000 SPI数据寄存器
|
|||
|
|||
//IAP/ISP 特殊功能寄存器
|
|||
sfr IAP_DATA = 0xC2; //0000,0000 EEPROM数据寄存器
|
|||
sfr IAP_ADDRH = 0xC3; //0000,0000 EEPROM地址高字节
|
|||
sfr IAP_ADDRL = 0xC4; //0000,0000 EEPROM地址第字节
|
|||
sfr IAP_CMD = 0xC5; //xxxx,xx00 EEPROM命令寄存器
|
|||
sfr IAP_TRIG = 0xC6; //0000,0000 EEPRPM命令触发寄存器
|
|||
sfr IAP_CONTR = 0xC7; //0000,x000 EEPROM控制寄存器
|
|||
|
|||
//PCA/PWM 特殊功能寄存器
|
|||
sfr CCON = 0xD8; //00xx,xx00 PCA控制寄存器
|
|||
sbit CF = CCON^7; |
|||
sbit CR = CCON^6; |
|||
sbit CCF2 = CCON^2; |
|||
sbit CCF1 = CCON^1; |
|||
sbit CCF0 = CCON^0; |
|||
sfr CMOD = 0xD9; //0xxx,x000 PCA 工作模式寄存器
|
|||
sfr CL = 0xE9; //0000,0000 PCA计数器低字节
|
|||
sfr CH = 0xF9; //0000,0000 PCA计数器高字节
|
|||
sfr CCAPM0 = 0xDA; //0000,0000 PCA模块0的PWM寄存器
|
|||
sfr CCAPM1 = 0xDB; //0000,0000 PCA模块1的PWM寄存器
|
|||
sfr CCAPM2 = 0xDC; //0000,0000 PCA模块2的PWM 寄存器
|
|||
sfr CCAP0L = 0xEA; //0000,0000 PCA模块0的捕捉/比较寄存器低字节
|
|||
sfr CCAP1L = 0xEB; //0000,0000 PCA模块1的捕捉/比较寄存器低字节
|
|||
sfr CCAP2L = 0xEC; //0000,0000 PCA模块2的捕捉/比较寄存器低字节
|
|||
sfr PCA_PWM0 = 0xF2; //xxxx,xx00 PCA模块0的PWM寄存器
|
|||
sfr PCA_PWM1 = 0xF3; //xxxx,xx00 PCA模块1的PWM寄存器
|
|||
sfr PCA_PWM2 = 0xF4; //xxxx,xx00 PCA模块1的PWM寄存器
|
|||
sfr CCAP0H = 0xFA; //0000,0000 PCA模块0的捕捉/比较寄存器高字节
|
|||
sfr CCAP1H = 0xFB; //0000,0000 PCA模块1的捕捉/比较寄存器高字节
|
|||
sfr CCAP2H = 0xFC; //0000,0000 PCA模块2的捕捉/比较寄存器高字节
|
|||
|
|||
//比较器特殊功能寄存器
|
|||
sfr CMPCR1 = 0xE6; //0000,0000 比较器控制寄存器1
|
|||
sfr CMPCR2 = 0xE7; //0000,0000 比较器控制寄存器2
|
|||
|
|||
|
|||
//sfr P_SW2 = 0xba;
|
|||
sfr PWMCFG = 0xf1; |
|||
sfr PWMIF = 0xf6; |
|||
sfr PWMFDCR = 0xf7; |
|||
sfr PWMCR = 0xfe; |
|||
|
|||
#define PWMC (*(unsigned int volatile xdata *)0xfff0) |
|||
#define PWMCKS (*(unsigned char volatile xdata *)0xfff2) |
|||
#define TADCP (*(unsigned int volatile xdata *)0xfff3) |
|||
#define PWM0T1 (*(unsigned int volatile xdata *)0xff00) |
|||
#define PWM0T2 (*(unsigned int volatile xdata *)0xff02) |
|||
#define PWM0CR (*(unsigned char volatile xdata *)0xff04) |
|||
#define PWM0HLD (*(unsigned char volatile xdata *)0xff05) |
|||
#define PWM1T1 (*(unsigned int volatile xdata *)0xff10) |
|||
#define PWM1T2 (*(unsigned int volatile xdata *)0xff12) |
|||
#define PWM1CR (*(unsigned char volatile xdata *)0xff14) |
|||
#define PWM1HLD (*(unsigned char volatile xdata *)0xff15) |
|||
#define PWM2T1 (*(unsigned int volatile xdata *)0xff20) |
|||
#define PWM2T2 (*(unsigned int volatile xdata *)0xff22) |
|||
#define PWM2CR (*(unsigned char volatile xdata *)0xff24) |
|||
#define PWM2HLD (*(unsigned char volatile xdata *)0xff25) |
|||
#define PWM3T1 (*(unsigned int volatile xdata *)0xff30) |
|||
#define PWM3T2 (*(unsigned int volatile xdata *)0xff32) |
|||
#define PWM3CR (*(unsigned char volatile xdata *)0xff34) |
|||
#define PWM3HLD (*(unsigned char volatile xdata *)0xff35) |
|||
#define PWM4T1 (*(unsigned int volatile xdata *)0xff40) |
|||
#define PWM4T2 (*(unsigned int volatile xdata *)0xff42) |
|||
#define PWM4CR (*(unsigned char volatile xdata *)0xff44) |
|||
#define PWM4HLD (*(unsigned char volatile xdata *)0xff45) |
|||
#define PWM5T1 (*(unsigned int volatile xdata *)0xff50) |
|||
#define PWM5T2 (*(unsigned int volatile xdata *)0xff52) |
|||
#define PWM5CR (*(unsigned char volatile xdata *)0xff54) |
|||
#define PWM5HLD (*(unsigned char volatile xdata *)0xff55) |
|||
#define PWM6T1 (*(unsigned int volatile xdata *)0xff60) |
|||
#define PWM6T2 (*(unsigned int volatile xdata *)0xff62) |
|||
#define PWM6CR (*(unsigned char volatile xdata *)0xff64) |
|||
#define PWM6HLD (*(unsigned char volatile xdata *)0xff65) |
|||
#define PWM7T1 (*(unsigned int volatile xdata *)0xff70) |
|||
#define PWM7T2 (*(unsigned int volatile xdata *)0xff72) |
|||
#define PWM7CR (*(unsigned char volatile xdata *)0xff74) |
|||
#define PWM7HLD (*(unsigned char volatile xdata *)0xff75) |
|||
|
|||
|
|||
#define CKSEL (*(unsigned char volatile xdata *)0xfE00)//108@ST8.PDF
|
|||
#define MCLKODIV BIT4 |
|||
#define MCLKO_S BITN3 |
|||
#define MCLKSEL BIT0 |
|||
|
|||
#define CLKDIV (*(unsigned char volatile xdata *)0xfE01)//108@ST8.PDF
|
|||
#define IRC24MCR (*(unsigned char volatile xdata *)0xfE02)//108@ST8.PDF
|
|||
#define XOSCCR (*(unsigned char volatile xdata *)0xfE03)//108@ST8.PDF
|
|||
#define IRC32KCR (*(unsigned char volatile xdata *)0xfE04)//108@ST8.PDF
|
|||
|
|||
|
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
|
|||
|
|||
/* P3 */ |
|||
sbit RD = 0xB7; |
|||
sbit WR = 0xB6; |
|||
sbit T1 = 0xB5; |
|||
sbit T0 = 0xB4; |
|||
sbit INT1 = 0xB3; |
|||
sbit INT0 = 0xB2; |
|||
sbit TXD = 0xB1; |
|||
sbit RXD = 0xB0; |
|||
|
|||
|
|||
|
|||
|
|||
#if 0 |
|||
/// >>>>> add by cc
|
|||
|
|||
|
|||
//sbit P34=P3^4; //定义SDA数据线
|
|||
//sbit P35=P3^5; //定义SCL时钟线
|
|||
#define mBIT_1(X,N) X|= (1<<N) |
|||
#define mBIT_0(X,N) X&=~(1<<N) |
|||
#define mBIT_G(X,N) (X&(1<<N)) |
|||
/// add by cc 20181118
|
|||
#define D_IO_normal_P0(n); mBIT_0(P0M1,n);mBIT_0(P0M0,n); |
|||
#define D_IO_normal_P1(n); mBIT_0(P1M1,n);mBIT_0(P1M0,n); |
|||
#define D_IO_normal_P2(n); mBIT_0(P2M1,n);mBIT_0(P2M0,n); |
|||
#define D_IO_normal_P3(n); mBIT_0(P3M1,n);mBIT_0(P3M0,n); |
|||
|
|||
#define D_IO_HighOut_P0(n); mBIT_0(P0M1,n);mBIT_1(P0M0,n); |
|||
#define D_IO_HighOut_P1(n); mBIT_0(P1M1,n);mBIT_1(P1M0,n); |
|||
#define D_IO_HighOut_P2(n); mBIT_0(P2M1,n);mBIT_1(P2M0,n); |
|||
#define D_IO_HighOut_P3(n); mBIT_0(P3M1,n);mBIT_1(P3M0,n); |
|||
//高阻状态
|
|||
|
|||
#define D_IO_HighR_P0(n); mBIT_1(P0M1,n);mBIT_0(P0M0,n); |
|||
#define D_IO_HighR_P1(n); mBIT_1(P1M1,n);mBIT_0(P1M0,n); |
|||
#define D_IO_HighR_P2(n); mBIT_1(P2M1,n);mBIT_0(P2M0,n); |
|||
#define D_IO_HighR_P3(n); mBIT_1(P3M1,n);mBIT_0(P3M0,n); |
|||
|
|||
#define D_IO_OpenDrain_P0(n); mBIT_1(P0M1,n);mBIT_1(P0M0,n); |
|||
#define D_IO_OpenDrain_P1(n); mBIT_1(P1M1,n);mBIT_1(P1M0,n); |
|||
#define D_IO_OpenDrain_P2(n); mBIT_1(P2M1,n);mBIT_1(P2M0,n); |
|||
#define D_IO_OpenDrain_P3(n); mBIT_1(P3M1,n);mBIT_1(P3M0,n); |
|||
|
|||
|
|||
//高阻状态
|
|||
#define P0_conf_in(n) mBIT_1(P0M1,n);mBIT_0(P0M0,n); |
|||
#define P1_conf_in(n) mBIT_1(P1M1,n);mBIT_0(P1M0,n); |
|||
#define P2_conf_in(n) mBIT_1(P2M1,n);mBIT_0(P2M0,n); |
|||
#define P2_conf_port(n) mBIT_0(P2M1,n);mBIT_0(P2M0,n); |
|||
|
|||
|
|||
#define P3_conf_in(n) mBIT_1(P3M1,n);mBIT_0(P3M0,n); |
|||
|
|||
#define P3_conf_port(n) mBIT_0(P3M1,n);mBIT_0(P3M0,n); |
|||
|
|||
|
|||
#define P4_conf_in(n) mBIT_1(P4M1,n);mBIT_0(P4M0,n); |
|||
#define P5_conf_in(n) mBIT_1(P5M1,n);mBIT_0(P5M0,n); |
|||
#define NOP() _nop_() |
|||
|
|||
|
|||
|
|||
//added by cc
|
|||
#define D_stdIO_P0_ALL() P0M1=0;P0M0=0; |
|||
#define D_HighI_P0_ALL() P0M1=0;P0M0=0XFF; |
|||
#define D_HighR_P0_ALL() P0M1=0XFF;P0M0=0; |
|||
#define D_OpenD_P0_ALL() P0M1=0XFF;P0M0=0XFF; |
|||
|
|||
#define D_stdIO_P1_ALL() P1M1=0;P1M0=0; |
|||
#define D_HighI_P1_ALL() P1M1=0;P1M0=0XFF; |
|||
#define D_HighR_P1_ALL() P1M1=0XFF;P1M0=0; |
|||
#define D_OpenD_P1_ALL() P1M1=0XFF;P1M0=0XFF; |
|||
|
|||
//// n: BITN0---BITN7
|
|||
#define D_stdIO_P0(BITN) BITN_0(P0M1,BITN);BITN_0(P0M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P0(BITN) BITN_0(P0M1,BITN);BITN_1(P0M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P0(BITN) BITN_1(P0M1,BITN);BITN_0(P0M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P0(BITN) BITN_1(P0M1,BITN);BITN_1(P0M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P1(BITN) BITN_0(P1M1,BITN);BITN_0(P1M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P1(BITN) BITN_0(P1M1,BITN);BITN_1(P1M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P1(BITN) BITN_1(P1M1,BITN);BITN_0(P1M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P1(BITN) BITN_1(P1M1,BITN);BITN_1(P1M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P2(BITN) BITN_0(P2M1,BITN);BITN_0(P2M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P2(BITN) BITN_0(P2M1,BITN);BITN_1(P2M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P2(BITN) BITN_1(P2M1,BITN);BITN_0(P2M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P2(BITN) BITN_1(P2M1,BITN);BITN_1(P2M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P3(BITN) BITN_0(P3M1,BITN);BITN_0(P3M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P3(BITN) BITN_0(P3M1,BITN);BITN_1(P3M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P3(BITN) BITN_1(P3M1,BITN);BITN_0(P3M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P3(BITN) BITN_1(P3M1,BITN);BITN_1(P3M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P4(BITN) BITN_0(P4M1,BITN);BITN_0(P4M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P4(BITN) BITN_0(P4M1,BITN);BITN_1(P4M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P4(BITN) BITN_1(P4M1,BITN);BITN_0(P4M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P4(BITN) BITN_1(P4M1,BITN);BITN_1(P4M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P5(BITN) BITN_0(P5M1,BITN);BITN_0(P5M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P5(BITN) BITN_0(P5M1,BITN);BITN_1(P5M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P5(BITN) BITN_1(P5M1,BITN);BITN_0(P5M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P5(BITN) BITN_1(P5M1,BITN);BITN_1(P5M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P6(BITN) BITN_0(P6M1,BITN);BITN_0(P6M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P6(BITN) BITN_0(P6M1,BITN);BITN_1(P6M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P6(BITN) BITN_1(P6M1,BITN);BITN_0(P6M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P6(BITN) BITN_1(P6M1,BITN);BITN_1(P6M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P7(BITN) BITN_0(P7M1,BITN);BITN_0(P7M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P7(BITN) BITN_0(P7M1,BITN);BITN_1(P7M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P7(BITN) BITN_1(P7M1,BITN);BITN_0(P7M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P7(BITN) BITN_1(P7M1,BITN);BITN_1(P7M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#endif |
|||
|
|||
/***
|
|||
|
|||
#define P0_conf_in(n) BITN_1(P0M1,n);BITN_0(P0M0,n); |
|||
#define P1_conf_in(n) BITN_1(P1M1,n);BITN_0(P1M0,n); |
|||
#define P2_conf_in(n) BITN_1(P2M1,n);BITN_0(P2M0,n); |
|||
#define P2_conf_port(n) BITN_0(P2M1,n);BITN_0(P2M0,n); |
|||
|
|||
#define P3_conf_in(n) BITN_1(P3M1,n);BITN_0(P3M0,n); |
|||
#define P3_conf_port(n) BITN_0(P3M1,n);BITN_0(P3M0,n); |
|||
|
|||
#define P4_conf_in(n) BITN_1(P4M1,n);BITN_0(P4M0,n); |
|||
#define P5_conf_in(n) BITN_1(P5M1,n);BITN_0(P5M0,n); |
|||
|
|||
***/ |
|||
|
|||
|
|||
|
|||
|
|||
#define L0_INT4_OPEN() BITN_1(INT_CLKO, INT_EX4) |
|||
#define L0_INT4_CLOSE() BITN_0(INT_CLKO, INT_EX4) |
|||
|
|||
#define L0_INT4_AT() BITN_G(INT_CLKO, INT_EX4) |
|||
|
|||
|
|||
|
|||
|
|||
#define L0_INT4_CLEAR() BITN_0(AUXINTIF, INT4IF) |
|||
#define L0_INT3_CLEAR() BITN_0(AUXINTIF, INT3IF) |
|||
#define L0_INT2_CLEAR() BITN_0(AUXINTIF, INT2IF) |
|||
|
|||
|
|||
|
|||
|
|||
//////
|
|||
|
|||
#define L0_INT3_OPEN() BITN_1(INT_CLKO, INT_EX3); |
|||
#define L0_INT3_CLOSE() BITN_0(INT_CLKO, INT_EX3); |
|||
#define L0_INT2_OPEN() BITN_1(INT_CLKO, INT_EX2); |
|||
#define L0_INT2_CLOSE() BITN_0(INT_CLKO, INT_EX2); |
|||
#define L0_INT1_OPEN() EX1 = 1; |
|||
#define L0_INT1_CLOSE() EX1 = 0; |
|||
#define L0_INT0_OPEN() EX0 = 1; |
|||
#define L0_INT0_CLOSE() EX0 = 0; |
|||
|
|||
#define D_ISR_int0 0 ///int0 下降沿触发 = 0 上下沿均可触发
|
|||
#define D_ISR_timer0 1 |
|||
#define D_ISR_int1 2 ///int1 下降沿触发 = 0 上下沿均可触发
|
|||
#define D_ISR_timer1 3 |
|||
#define D_ISR_int2 10 /////只有下降沿
|
|||
#define D_ISR_int3 11 /////只有下降沿
|
|||
#define D_SERVE_UART 4 |
|||
#define D_ISR_int4 16 /////只有下降沿
|
|||
|
|||
#if 0 |
|||
#define L0_TIMER1_start() TR1 = 1; |
|||
#define L0_TIMER1_end() TR1 = 0; |
|||
|
|||
|
|||
#define L0_TIMER1_isr_OPEN() ET1 = 1; |
|||
#define L0_TIMER1_isr_CLOSE() ET1 = 0; |
|||
|
|||
|
|||
#else |
|||
|
|||
#define L0_TIMER1_start() ET1 = 1; |
|||
#define L0_TIMER1_end() ET1 = 0; |
|||
|
|||
|
|||
#define L0_TIMER1_isr_OPEN() TR1 = 1; |
|||
#define L0_TIMER1_isr_CLOSE() TR1 = 0; |
|||
|
|||
|
|||
#endif |
|||
|
|||
/// fixme 颠倒定义会让c51锁死#define _nop_() NOP()
|
|||
|
|||
///#define L0_INT3_OPEN() BITN_1(INT_CLKO,INT_EX3); //使能INT3中断
|
|||
///#define L0_INT3_CLOSE() BITN_0(INT_CLKO,INT_EX3);
|
|||
#endif //STC_stc8a8k
|
|||
|
|||
|
|||
|
|||
|
|||
|
|||
|
|||
|
@ -1,466 +0,0 @@ |
|||
#ifndef __STC15F2K60S2_H_ |
|||
#define __STC15F2K60S2_H_ |
|||
// stc_stc15w.h
|
|||
#include<intrins.h> |
|||
|
|||
/////////////////////////////////////////////////
|
|||
//注意: STC15W4K32S4系列的芯片,上电后所有与PWM相关的IO口均为
|
|||
// 高阻态,需将这些口设置为准双向口或强推挽模式方可正常使用
|
|||
//相关IO: P0.6/P0.7/P1.6/P1.7/P2.1/P2.2
|
|||
// P2.3/P2.7/P3.7/P4.2/P4.4/P4.5
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
//包含本头文件后,不用另外再包含"REG51.H"
|
|||
|
|||
//内核特殊功能寄存器 // 复位值 描述
|
|||
sfr ACC = 0xE0; //0000,0000 累加器Accumulator
|
|||
sfr B = 0xF0; //0000,0000 B寄存器
|
|||
sfr PSW = 0xD0; //0000,0000 程序状态字
|
|||
sbit CY = PSW^7; |
|||
sbit AC = PSW^6; |
|||
sbit F0 = PSW^5; |
|||
sbit RS1 = PSW^4; |
|||
sbit RS0 = PSW^3; |
|||
sbit OV = PSW^2; |
|||
sbit P = PSW^0; |
|||
sfr SP = 0x81; //0000,0111 堆栈指针
|
|||
sfr DPL = 0x82; //0000,0000 数据指针低字节
|
|||
sfr DPH = 0x83; //0000,0000 数据指针高字节
|
|||
|
|||
//I/O 口特殊功能寄存器
|
|||
sfr P0 = 0x80; //1111,1111 端口0
|
|||
sbit P00 = P0^0; |
|||
sbit P01 = P0^1; |
|||
sbit P02 = P0^2; |
|||
sbit P03 = P0^3; |
|||
sbit P04 = P0^4; |
|||
sbit P05 = P0^5; |
|||
sbit P06 = P0^6; |
|||
sbit P07 = P0^7; |
|||
sfr P1 = 0x90; //1111,1111 端口1
|
|||
sbit P10 = P1^0; |
|||
sbit P11 = P1^1; |
|||
sbit P12 = P1^2; |
|||
sbit P13 = P1^3; |
|||
sbit P14 = P1^4; |
|||
sbit P15 = P1^5; |
|||
sbit P16 = P1^6; |
|||
sbit P17 = P1^7; |
|||
sfr P2 = 0xA0; //1111,1111 端口2
|
|||
sbit P20 = P2^0; |
|||
sbit P21 = P2^1; |
|||
sbit P22 = P2^2; |
|||
sbit P23 = P2^3; |
|||
sbit P24 = P2^4; |
|||
sbit P25 = P2^5; |
|||
sbit P26 = P2^6; |
|||
sbit P27 = P2^7; |
|||
sfr P3 = 0xB0; //1111,1111 端口3
|
|||
sbit P30 = P3^0; |
|||
sbit P31 = P3^1; |
|||
sbit P32 = P3^2; |
|||
sbit P33 = P3^3; |
|||
sbit P34 = P3^4; |
|||
sbit P35 = P3^5; |
|||
sbit P36 = P3^6; |
|||
sbit P37 = P3^7; |
|||
sfr P4 = 0xC0; //1111,1111 端口4
|
|||
sbit P40 = P4^0; |
|||
sbit P41 = P4^1; |
|||
sbit P42 = P4^2; |
|||
sbit P43 = P4^3; |
|||
sbit P44 = P4^4; |
|||
sbit P45 = P4^5; |
|||
sbit P46 = P4^6; |
|||
sbit P47 = P4^7; |
|||
sfr P5 = 0xC8; //xxxx,1111 端口5
|
|||
sbit P50 = P5^0; |
|||
sbit P51 = P5^1; |
|||
sbit P52 = P5^2; |
|||
sbit P53 = P5^3; |
|||
sbit P54 = P5^4; |
|||
sbit P55 = P5^5; |
|||
sbit P56 = P5^6; |
|||
sbit P57 = P5^7; |
|||
sfr P6 = 0xE8; //0000,0000 端口6
|
|||
sbit P60 = P6^0; |
|||
sbit P61 = P6^1; |
|||
sbit P62 = P6^2; |
|||
sbit P63 = P6^3; |
|||
sbit P64 = P6^4; |
|||
sbit P65 = P6^5; |
|||
sbit P66 = P6^6; |
|||
sbit P67 = P6^7; |
|||
sfr P7 = 0xF8; //0000,0000 端口7
|
|||
sbit P70 = P7^0; |
|||
sbit P71 = P7^1; |
|||
sbit P72 = P7^2; |
|||
sbit P73 = P7^3; |
|||
sbit P74 = P7^4; |
|||
sbit P75 = P7^5; |
|||
sbit P76 = P7^6; |
|||
sbit P77 = P7^7; |
|||
sfr P0M0 = 0x94; //0000,0000 端口0模式寄存器0
|
|||
sfr P0M1 = 0x93; //0000,0000 端口0模式寄存器1
|
|||
sfr P1M0 = 0x92; //0000,0000 端口1模式寄存器0
|
|||
sfr P1M1 = 0x91; //0000,0000 端口1模式寄存器1
|
|||
sfr P2M0 = 0x96; //0000,0000 端口2模式寄存器0
|
|||
sfr P2M1 = 0x95; //0000,0000 端口2模式寄存器1
|
|||
sfr P3M0 = 0xB2; //0000,0000 端口3模式寄存器0
|
|||
sfr P3M1 = 0xB1; //0000,0000 端口3模式寄存器1
|
|||
sfr P4M0 = 0xB4; //0000,0000 端口4模式寄存器0
|
|||
sfr P4M1 = 0xB3; //0000,0000 端口4模式寄存器1
|
|||
sfr P5M0 = 0xCA; //0000,0000 端口5模式寄存器0
|
|||
sfr P5M1 = 0xC9; //0000,0000 端口5模式寄存器1
|
|||
sfr P6M0 = 0xCC; //0000,0000 端口6模式寄存器0
|
|||
sfr P6M1 = 0xCB; //0000,0000 端口6模式寄存器1
|
|||
sfr P7M0 = 0xE2; //0000,0000 端口7模式寄存器0
|
|||
sfr P7M1 = 0xE1; //0000,0000 端口7模式寄存器1
|
|||
|
|||
//系统管理特殊功能寄存器
|
|||
sfr PCON = 0x87; //0001,0000 电源控制寄存器
|
|||
sfr AUXR = 0x8E; //0000,0000 辅助寄存器
|
|||
|
|||
#define TOx12 BITN7 |
|||
#define T1x12 BITN6 |
|||
#define UART_M0x6 BITN5 //串口1模式0速度 =0 12倍 = 1 两倍
|
|||
#define T2R BITN4 //定时器2 运行 =1
|
|||
#define T2_C BITN3 //定时器/计数器选择
|
|||
#define T2x12 BITN2 |
|||
#define EXTRAM BITN1 |
|||
#define S1ST2 BITN0 //串口1选择定时器1 =0 选择定时器2 =1
|
|||
|
|||
|
|||
|
|||
|
|||
sfr AUXR1 = 0xA2; //0000,0000 辅助寄存器1
|
|||
sfr P_SW1 = 0xA2; //0000,0000 外设端口切换寄存器1
|
|||
sfr CLK_DIV = 0x97; //0000,0000 时钟分频控制寄存器
|
|||
sfr BUS_SPEED = 0xA1; //xx10,x011 总线速度控制寄存器
|
|||
sfr P1ASF = 0x9D; //0000,0000 端口1模拟功能配置寄存器
|
|||
sfr P_SW2 = 0xBA; //0xxx,x000 外设端口切换寄存器
|
|||
|
|||
//中断特殊功能寄存器
|
|||
sfr IE = 0xA8; //0000,0000 中断控制寄存器
|
|||
sbit EA = IE^7; |
|||
sbit ELVD = IE^6; |
|||
sbit EADC = IE^5; |
|||
sbit ES = IE^4; |
|||
sbit ET1 = IE^3; |
|||
sbit EX1 = IE^2; |
|||
sbit ET0 = IE^1; |
|||
sbit EX0 = IE^0; |
|||
sfr IP = 0xB8; //0000,0000 中断优先级寄存器
|
|||
sbit PPCA = IP^7; |
|||
sbit PLVD = IP^6; |
|||
sbit PADC = IP^5; |
|||
sbit PS = IP^4; |
|||
sbit PT1 = IP^3; |
|||
sbit PX1 = IP^2; |
|||
sbit PT0 = IP^1; |
|||
sbit PX0 = IP^0; |
|||
sfr IE2 = 0xAF; //0000,0000 中断控制寄存器2
|
|||
/// 不可位寻址
|
|||
#define ET4 BITN6 |
|||
#define ET3 BITN5 |
|||
#define ES4 BITN4 |
|||
#define ES3 BITN3 |
|||
#define ET2 BITN2 |
|||
#define ESPI BITN1 |
|||
#define ES2 BITN0 |
|||
|
|||
sfr IP2 = 0xB5; //xxxx,xx00 中断优先级寄存器2
|
|||
sfr INT_CLKO = 0x8F; //0000,0000 外部中断与时钟输出控制寄存器
|
|||
|
|||
//定时器特殊功能寄存器
|
|||
sfr TCON = 0x88; //0000,0000 T0/T1控制寄存器
|
|||
sbit TF1 = TCON^7; |
|||
sbit TR1 = TCON^6; |
|||
sbit TF0 = TCON^5; |
|||
sbit TR0 = TCON^4; |
|||
sbit IE1 = TCON^3; |
|||
sbit IT1 = TCON^2; |
|||
sbit IE0 = TCON^1; |
|||
sbit IT0 = TCON^0; |
|||
sfr TMOD = 0x89; //0000,0000 T0/T1模式寄存器
|
|||
sfr TL0 = 0x8A; //0000,0000 T0低字节
|
|||
sfr TL1 = 0x8B; //0000,0000 T1低字节
|
|||
sfr TH0 = 0x8C; //0000,0000 T0高字节
|
|||
sfr TH1 = 0x8D; //0000,0000 T1高字节
|
|||
sfr T4T3M = 0xD1; //0000,0000 T3/T4模式寄存器
|
|||
sfr T3T4M = 0xD1; //0000,0000 T3/T4模式寄存器
|
|||
sfr T4H = 0xD2; //0000,0000 T4高字节
|
|||
sfr T4L = 0xD3; //0000,0000 T4低字节
|
|||
sfr T3H = 0xD4; //0000,0000 T3高字节
|
|||
sfr T3L = 0xD5; //0000,0000 T3低字节
|
|||
sfr T2H = 0xD6; //0000,0000 T2高字节
|
|||
sfr T2L = 0xD7; //0000,0000 T2低字节
|
|||
sfr WKTCL = 0xAA; //0000,0000 掉电唤醒定时器低字节
|
|||
sfr WKTCH = 0xAB; //0000,0000 掉电唤醒定时器高字节
|
|||
sfr WDT_CONTR = 0xC1; //0000,0000 看门狗控制寄存器
|
|||
|
|||
//串行口特殊功能寄存器
|
|||
sfr SCON = 0x98; //0000,0000 串口1控制寄存器
|
|||
sbit SM0 = SCON^7; |
|||
sbit SM1 = SCON^6; |
|||
sbit SM2 = SCON^5; |
|||
sbit REN = SCON^4; |
|||
sbit TB8 = SCON^3; |
|||
sbit RB8 = SCON^2; |
|||
sbit TI = SCON^1; |
|||
sbit RI = SCON^0; |
|||
//sfr SBUF = 0x99; //xxxx,xxxx 串口1数据寄存器
|
|||
//sfr S2CON = 0x9A; //0000,0000 串口2控制寄存器
|
|||
//sfr S2BUF = 0x9B; //xxxx,xxxx 串口2数据寄存器
|
|||
//sfr SADDR = 0xA9; //0000,0000 从机地址寄存器
|
|||
//sfr SADEN = 0xB9; //0000,0000 从机地址屏蔽寄存器
|
|||
|
|||
sfr SBUF = 0x99; //Serial Data Buffer
|
|||
sfr SBUF0 = 0x99; //Serial Data Buffer xxxx,xxxx
|
|||
sfr SADEN = 0xB9; //Slave Address Mask 0000,0000
|
|||
sfr SADDR = 0xA9; //Slave Address 0000,0000
|
|||
//-----------------------------------
|
|||
// 7 6 5 4 3 2 1 0 Reset Value
|
|||
sfr S2CON = 0x9A; //S2 Control S2SM0 S2SM1 S2SM2 S2REN S2TB8 S2RB8 S2TI S2RI 00000000B
|
|||
#define S2SM0 BITN7 |
|||
#define S2ST4 BITN6 |
|||
#define S2SM2 BITN5 |
|||
#define S2REN BITN4 |
|||
#define S2TB8 BITN3 |
|||
#define S2RB8 BITN2 |
|||
#define S2TI BITN1 |
|||
#define S2RI BITN0 |
|||
|
|||
sfr S2BUF = 0x9B; //S2 Serial Buffer xxxx,xxxx
|
|||
//sfr BRT = 0x9C; //S2 Baud-Rate Timer 0000,0000
|
|||
|
|||
//---------------------------------------------------------------
|
|||
sfr S3CON = 0xAC; //0000,0000 串口3控制寄存器
|
|||
#define S3SM0 BITN7 |
|||
#define S3ST4 BITN6 |
|||
#define S3SM2 BITN5 |
|||
#define S3REN BITN4 |
|||
#define S3TB8 BITN3 |
|||
#define S3RB8 BITN2 |
|||
#define S3TI BITN1 |
|||
#define S3RI BITN0 |
|||
|
|||
sfr S3BUF = 0xAD; //xxxx,xxxx 串口3数据寄存器
|
|||
//---------------------------------------------------------------
|
|||
sfr S4CON = 0x84; //0000,0000 串口4控制寄存器
|
|||
#define S4SM0 BITN7 |
|||
#define S4ST4 BITN6 |
|||
#define S4SM2 BITN5 |
|||
#define S4REN BITN4 |
|||
#define S4TB8 BITN3 |
|||
#define S4RB8 BITN2 |
|||
#define S4TI BITN1 |
|||
#define S4RI BITN0 |
|||
|
|||
sfr S4BUF = 0x85; //xxxx,xxxx 串口4数据寄存器
|
|||
|
|||
//ADC 特殊功能寄存器
|
|||
sfr ADC_CONTR = 0xBC; //0000,0000 A/D转换控制寄存器
|
|||
sfr ADC_RES = 0xBD; //0000,0000 A/D转换结果高8位
|
|||
sfr ADC_RESL = 0xBE; //0000,0000 A/D转换结果低2位
|
|||
|
|||
//SPI 特殊功能寄存器
|
|||
sfr SPSTAT = 0xCD; //00xx,xxxx SPI状态寄存器
|
|||
sfr SPCTL = 0xCE; //0000,0100 SPI控制寄存器
|
|||
sfr SPDAT = 0xCF; //0000,0000 SPI数据寄存器
|
|||
|
|||
//IAP/ISP 特殊功能寄存器
|
|||
sfr IAP_DATA = 0xC2; //0000,0000 EEPROM数据寄存器
|
|||
sfr IAP_ADDRH = 0xC3; //0000,0000 EEPROM地址高字节
|
|||
sfr IAP_ADDRL = 0xC4; //0000,0000 EEPROM地址第字节
|
|||
sfr IAP_CMD = 0xC5; //xxxx,xx00 EEPROM命令寄存器
|
|||
sfr IAP_TRIG = 0xC6; //0000,0000 EEPRPM命令触发寄存器
|
|||
sfr IAP_CONTR = 0xC7; //0000,x000 EEPROM控制寄存器
|
|||
|
|||
//PCA/PWM 特殊功能寄存器
|
|||
sfr CCON = 0xD8; //00xx,xx00 PCA控制寄存器
|
|||
sbit CF = CCON^7; |
|||
sbit CR = CCON^6; |
|||
sbit CCF2 = CCON^2; |
|||
sbit CCF1 = CCON^1; |
|||
sbit CCF0 = CCON^0; |
|||
sfr CMOD = 0xD9; //0xxx,x000 PCA 工作模式寄存器
|
|||
sfr CL = 0xE9; //0000,0000 PCA计数器低字节
|
|||
sfr CH = 0xF9; //0000,0000 PCA计数器高字节
|
|||
sfr CCAPM0 = 0xDA; //0000,0000 PCA模块0的PWM寄存器
|
|||
sfr CCAPM1 = 0xDB; //0000,0000 PCA模块1的PWM寄存器
|
|||
sfr CCAPM2 = 0xDC; //0000,0000 PCA模块2的PWM 寄存器
|
|||
sfr CCAP0L = 0xEA; //0000,0000 PCA模块0的捕捉/比较寄存器低字节
|
|||
sfr CCAP1L = 0xEB; //0000,0000 PCA模块1的捕捉/比较寄存器低字节
|
|||
sfr CCAP2L = 0xEC; //0000,0000 PCA模块2的捕捉/比较寄存器低字节
|
|||
sfr PCA_PWM0 = 0xF2; //xxxx,xx00 PCA模块0的PWM寄存器
|
|||
sfr PCA_PWM1 = 0xF3; //xxxx,xx00 PCA模块1的PWM寄存器
|
|||
sfr PCA_PWM2 = 0xF4; //xxxx,xx00 PCA模块1的PWM寄存器
|
|||
sfr CCAP0H = 0xFA; //0000,0000 PCA模块0的捕捉/比较寄存器高字节
|
|||
sfr CCAP1H = 0xFB; //0000,0000 PCA模块1的捕捉/比较寄存器高字节
|
|||
sfr CCAP2H = 0xFC; //0000,0000 PCA模块2的捕捉/比较寄存器高字节
|
|||
|
|||
//比较器特殊功能寄存器
|
|||
sfr CMPCR1 = 0xE6; //0000,0000 比较器控制寄存器1
|
|||
sfr CMPCR2 = 0xE7; //0000,0000 比较器控制寄存器2
|
|||
|
|||
//增强型PWM波形发生器特殊功能寄存器
|
|||
sfr PWMCFG = 0xf1; //x000,0000 PWM配置寄存器
|
|||
sfr PWMCR = 0xf5; //0000,0000 PWM控制寄存器
|
|||
sfr PWMIF = 0xf6; //x000,0000 PWM中断标志寄存器
|
|||
sfr PWMFDCR = 0xf7; //xx00,0000 PWM外部异常检测控制寄存器
|
|||
|
|||
//如下特殊功能寄存器位于扩展RAM区域
|
|||
//访问这些寄存器,需先将P_SW2的BIT7设置为1,才可正常读写
|
|||
#define PWMC (*(unsigned int volatile xdata *)0xfff0) |
|||
#define PWMCH (*(unsigned char volatile xdata *)0xfff0) |
|||
#define PWMCL (*(unsigned char volatile xdata *)0xfff1) |
|||
#define PWMCKS (*(unsigned char volatile xdata *)0xfff2) |
|||
#define PWM2T1 (*(unsigned int volatile xdata *)0xff00) |
|||
#define PWM2T1H (*(unsigned char volatile xdata *)0xff00) |
|||
#define PWM2T1L (*(unsigned char volatile xdata *)0xff01) |
|||
#define PWM2T2 (*(unsigned int volatile xdata *)0xff02) |
|||
#define PWM2T2H (*(unsigned char volatile xdata *)0xff02) |
|||
#define PWM2T2L (*(unsigned char volatile xdata *)0xff03) |
|||
#define PWM2CR (*(unsigned char volatile xdata *)0xff04) |
|||
#define PWM3T1 (*(unsigned int volatile xdata *)0xff10) |
|||
#define PWM3T1H (*(unsigned char volatile xdata *)0xff10) |
|||
#define PWM3T1L (*(unsigned char volatile xdata *)0xff11) |
|||
#define PWM3T2 (*(unsigned int volatile xdata *)0xff12) |
|||
#define PWM3T2H (*(unsigned char volatile xdata *)0xff12) |
|||
#define PWM3T2L (*(unsigned char volatile xdata *)0xff13) |
|||
#define PWM3CR (*(unsigned char volatile xdata *)0xff14) |
|||
#define PWM4T1 (*(unsigned int volatile xdata *)0xff20) |
|||
#define PWM4T1H (*(unsigned char volatile xdata *)0xff20) |
|||
#define PWM4T1L (*(unsigned char volatile xdata *)0xff21) |
|||
#define PWM4T2 (*(unsigned int volatile xdata *)0xff22) |
|||
#define PWM4T2H (*(unsigned char volatile xdata *)0xff22) |
|||
#define PWM4T2L (*(unsigned char volatile xdata *)0xff23) |
|||
#define PWM4CR (*(unsigned char volatile xdata *)0xff24) |
|||
#define PWM5T1 (*(unsigned int volatile xdata *)0xff30) |
|||
#define PWM5T1H (*(unsigned char volatile xdata *)0xff30) |
|||
#define PWM5T1L (*(unsigned char volatile xdata *)0xff31) |
|||
#define PWM5T2 (*(unsigned int volatile xdata *)0xff32) |
|||
#define PWM5T2H (*(unsigned char volatile xdata *)0xff32) |
|||
#define PWM5T2L (*(unsigned char volatile xdata *)0xff33) |
|||
#define PWM5CR (*(unsigned char volatile xdata *)0xff34) |
|||
#define PWM6T1 (*(unsigned int volatile xdata *)0xff40) |
|||
#define PWM6T1H (*(unsigned char volatile xdata *)0xff40) |
|||
#define PWM6T1L (*(unsigned char volatile xdata *)0xff41) |
|||
#define PWM6T2 (*(unsigned int volatile xdata *)0xff42) |
|||
#define PWM6T2H (*(unsigned char volatile xdata *)0xff42) |
|||
#define PWM6T2L (*(unsigned char volatile xdata *)0xff43) |
|||
#define PWM6CR (*(unsigned char volatile xdata *)0xff44) |
|||
#define PWM7T1 (*(unsigned int volatile xdata *)0xff50) |
|||
#define PWM7T1H (*(unsigned char volatile xdata *)0xff50) |
|||
#define PWM7T1L (*(unsigned char volatile xdata *)0xff51) |
|||
#define PWM7T2 (*(unsigned int volatile xdata *)0xff52) |
|||
#define PWM7T2H (*(unsigned char volatile xdata *)0xff52) |
|||
#define PWM7T2L (*(unsigned char volatile xdata *)0xff53) |
|||
#define PWM7CR (*(unsigned char volatile xdata *)0xff54) |
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
|
|||
|
|||
/* P3 */ |
|||
sbit RD = 0xB7; |
|||
sbit WR = 0xB6; |
|||
sbit T1 = 0xB5; |
|||
sbit T0 = 0xB4; |
|||
sbit INT1 = 0xB3; |
|||
sbit INT0 = 0xB2; |
|||
sbit TXD = 0xB1; |
|||
sbit RXD = 0xB0; |
|||
|
|||
|
|||
|
|||
|
|||
|
|||
/// >>>>> add by cc
|
|||
|
|||
|
|||
//sbit P34=P3^4; //定义SDA数据线
|
|||
//sbit P35=P3^5; //定义SCL时钟线
|
|||
#define mBIT_1(X,N) X|= (1<<N) |
|||
#define mBIT_0(X,N) X&=~(1<<N) |
|||
#define mBIT_G(X,N) (X&(1<<N)) |
|||
|
|||
//高阻状态
|
|||
#define P0_conf_in(n) mBIT_1(P0M1,n);mBIT_0(P0M0,n); |
|||
#define P1_conf_in(n) mBIT_1(P1M1,n);mBIT_0(P1M0,n); |
|||
#define P2_conf_in(n) mBIT_1(P2M1,n);mBIT_0(P2M0,n); |
|||
#define P2_conf_port(n) mBIT_0(P2M1,n);mBIT_0(P2M0,n); |
|||
|
|||
|
|||
#define P3_conf_in(n) mBIT_1(P3M1,n);mBIT_0(P3M0,n); |
|||
|
|||
#define P3_conf_port(n) mBIT_0(P3M1,n);mBIT_0(P3M0,n); |
|||
|
|||
|
|||
#define P4_conf_in(n) mBIT_1(P4M1,n);mBIT_0(P4M0,n); |
|||
#define P5_conf_in(n) mBIT_1(P5M1,n);mBIT_0(P5M0,n); |
|||
#define NOP() _nop_() |
|||
|
|||
|
|||
#define D_stdIO_P0_ALL() P0M1=0;P0M0=0; |
|||
#define D_HighI_P0_ALL() P0M1=0;P0M0=0XFF; |
|||
#define D_HighR_P0_ALL() P0M1=0XFF;P0M0=0; |
|||
#define D_OpenD_P0_ALL() P0M1=0XFF;P0M0=0XFF; |
|||
|
|||
#define D_stdIO_P1_ALL() P1M1=0;P1M0=0; |
|||
#define D_HighI_P1_ALL() P1M1=0;P1M0=0XFF; |
|||
#define D_HighR_P1_ALL() P1M1=0XFF;P1M0=0; |
|||
#define D_OpenD_P1_ALL() P1M1=0XFF;P1M0=0XFF; |
|||
|
|||
//// n: BITN0---BITN7
|
|||
#define D_stdIO_P0(BITN) BITN_0(P0M1,BITN);BITN_0(P0M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P0(BITN) BITN_0(P0M1,BITN);BITN_1(P0M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P0(BITN) BITN_1(P0M1,BITN);BITN_0(P0M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P0(BITN) BITN_1(P0M1,BITN);BITN_1(P0M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P1(BITN) BITN_0(P1M1,BITN);BITN_0(P1M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P1(BITN) BITN_0(P1M1,BITN);BITN_1(P1M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P1(BITN) BITN_1(P1M1,BITN);BITN_0(P1M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P1(BITN) BITN_1(P1M1,BITN);BITN_1(P1M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P2(BITN) BITN_0(P2M1,BITN);BITN_0(P2M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P2(BITN) BITN_0(P2M1,BITN);BITN_1(P2M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P2(BITN) BITN_1(P2M1,BITN);BITN_0(P2M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P2(BITN) BITN_1(P2M1,BITN);BITN_1(P2M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P3(BITN) BITN_0(P3M1,BITN);BITN_0(P3M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P3(BITN) BITN_0(P3M1,BITN);BITN_1(P3M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P3(BITN) BITN_1(P3M1,BITN);BITN_0(P3M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P3(BITN) BITN_1(P3M1,BITN);BITN_1(P3M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P4(BITN) BITN_0(P4M1,BITN);BITN_0(P4M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P4(BITN) BITN_0(P4M1,BITN);BITN_1(P4M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P4(BITN) BITN_1(P4M1,BITN);BITN_0(P4M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P4(BITN) BITN_1(P4M1,BITN);BITN_1(P4M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P5(BITN) BITN_0(P5M1,BITN);BITN_0(P5M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P5(BITN) BITN_0(P5M1,BITN);BITN_1(P5M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P5(BITN) BITN_1(P5M1,BITN);BITN_0(P5M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P5(BITN) BITN_1(P5M1,BITN);BITN_1(P5M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P6(BITN) BITN_0(P6M1,BITN);BITN_0(P6M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P6(BITN) BITN_0(P6M1,BITN);BITN_1(P6M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P6(BITN) BITN_1(P6M1,BITN);BITN_0(P6M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P6(BITN) BITN_1(P6M1,BITN);BITN_1(P6M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P7(BITN) BITN_0(P7M1,BITN);BITN_0(P7M0,BITN); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P7(BITN) BITN_0(P7M1,BITN);BITN_1(P7M0,BITN); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P7(BITN) BITN_1(P7M1,BITN);BITN_0(P7M0,BITN); /////////10 高阻
|
|||
#define D_OpenD_P7(BITN) BITN_1(P7M1,BITN);BITN_1(P7M0,BITN); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
|
|||
#endif |
|||
|
|||
|
|||
|
|||
|
|||
|
|||
|
@ -1,746 +0,0 @@ |
|||
#ifndef __STC8G_H_ |
|||
#define __STC8G_H_ |
|||
|
|||
// STC_stc8a8k.h
|
|||
#include<intrins.h> |
|||
/////////////////////////////////////////////////
|
|||
//注意: STC15W4K32S4系列的芯片,上电后所有与PWM相关的IO口均为
|
|||
// 高阻态,需将这些口设置为准双向口或强推挽模式方可正常使用
|
|||
//相关IO: P0.6/P0.7/P1.6/P1.7/P2.1/P2.2
|
|||
// P2.3/P2.7/P3.7/P4.2/P4.4/P4.5
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
//包含本头文件后,不用另外再包含"REG51.H"
|
|||
|
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
//包含本头文件后,不用另外再包含"REG51.H"
|
|||
|
|||
sfr P0 = 0x80; |
|||
sbit P00 = P0^0; |
|||
sbit P01 = P0^1; |
|||
sbit P02 = P0^2; |
|||
sbit P03 = P0^3; |
|||
sbit P04 = P0^4; |
|||
sbit P05 = P0^5; |
|||
sbit P06 = P0^6; |
|||
sbit P07 = P0^7; |
|||
sfr SP = 0x81; |
|||
sfr DPL = 0x82; |
|||
sfr DPH = 0x83; |
|||
sfr S4CON = 0x84; |
|||
sfr S4BUF = 0x85; |
|||
sfr PCON = 0x87; |
|||
sfr TCON = 0x88; |
|||
sbit TF1 = TCON^7; |
|||
sbit TR1 = TCON^6; |
|||
sbit TF0 = TCON^5; |
|||
sbit TR0 = TCON^4; |
|||
sbit IE1 = TCON^3; |
|||
sbit IT1 = TCON^2; |
|||
sbit IE0 = TCON^1; |
|||
sbit IT0 = TCON^0; |
|||
sfr TMOD = 0x89; |
|||
sfr TL0 = 0x8A; |
|||
sfr TL1 = 0x8B; |
|||
sfr TH0 = 0x8C; |
|||
sfr TH1 = 0x8D; |
|||
sfr AUXR = 0x8E; |
|||
sfr INTCLKO = 0x8F; |
|||
sfr P1 = 0x90; |
|||
sbit P10 = P1^0; |
|||
sbit P11 = P1^1; |
|||
sbit P12 = P1^2; |
|||
sbit P13 = P1^3; |
|||
sbit P14 = P1^4; |
|||
sbit P15 = P1^5; |
|||
sbit P16 = P1^6; |
|||
sbit P17 = P1^7; |
|||
sfr P1M1 = 0x91; |
|||
sfr P1M0 = 0x92; |
|||
sfr P0M1 = 0x93; |
|||
sfr P0M0 = 0x94; |
|||
sfr P2M1 = 0x95; |
|||
sfr P2M0 = 0x96; |
|||
sfr SCON = 0x98; |
|||
sbit SM0 = SCON^7; |
|||
sbit SM1 = SCON^6; |
|||
sbit SM2 = SCON^5; |
|||
sbit REN = SCON^4; |
|||
sbit TB8 = SCON^3; |
|||
sbit RB8 = SCON^2; |
|||
sbit TI = SCON^1; |
|||
sbit RI = SCON^0; |
|||
sfr SBUF = 0x99; |
|||
sfr S2CON = 0x9A; |
|||
sfr S2BUF = 0x9B; |
|||
sfr IRCBAND = 0x9D; |
|||
sfr LIRTRIM = 0x9E; |
|||
sfr IRTRIM = 0x9F; |
|||
sfr P2 = 0xA0; |
|||
sbit P20 = P2^0; |
|||
sbit P21 = P2^1; |
|||
sbit P22 = P2^2; |
|||
sbit P23 = P2^3; |
|||
sbit P24 = P2^4; |
|||
sbit P25 = P2^5; |
|||
sbit P26 = P2^6; |
|||
sbit P27 = P2^7; |
|||
sfr P_SW1 = 0xA2; |
|||
sfr IE = 0xA8; |
|||
sbit EA = IE^7; |
|||
sbit ELVD = IE^6; |
|||
sbit EADC = IE^5; |
|||
sbit ES = IE^4; |
|||
sbit ET1 = IE^3; |
|||
sbit EX1 = IE^2; |
|||
sbit ET0 = IE^1; |
|||
sbit EX0 = IE^0; |
|||
sfr SADDR = 0xA9; |
|||
sfr WKTCL = 0xAA; |
|||
sfr WKTCH = 0xAB; |
|||
sfr S3CON = 0xAC; |
|||
sfr S3BUF = 0xAD; |
|||
sfr TA = 0xAE; |
|||
sfr IE2 = 0xAF; |
|||
sfr P3 = 0xB0; |
|||
sbit P30 = P3^0; |
|||
sbit P31 = P3^1; |
|||
sbit P32 = P3^2; |
|||
sbit P33 = P3^3; |
|||
sbit P34 = P3^4; |
|||
sbit P35 = P3^5; |
|||
sbit P36 = P3^6; |
|||
sbit P37 = P3^7; |
|||
sfr P3M1 = 0xB1; |
|||
sfr P3M0 = 0xB2; |
|||
sfr P4M1 = 0xB3; |
|||
sfr P4M0 = 0xB4; |
|||
sfr IP2 = 0xB5; |
|||
sfr IP2H = 0xB6; |
|||
sfr IPH = 0xB7; |
|||
sfr IP = 0xB8; |
|||
sbit PPCA = IP^7; |
|||
sbit PLVD = IP^6; |
|||
sbit PADC = IP^5; |
|||
sbit PS = IP^4; |
|||
sbit PT1 = IP^3; |
|||
sbit PX1 = IP^2; |
|||
sbit PT0 = IP^1; |
|||
sbit PX0 = IP^0; |
|||
sfr SADEN = 0xB9; |
|||
sfr P_SW2 = 0xBA; |
|||
sfr ADC_CONTR = 0xBC; |
|||
sfr ADC_RES = 0xBD; |
|||
sfr ADC_RESL = 0xBE; |
|||
sfr P4 = 0xC0; |
|||
sbit P40 = P4^0; |
|||
sbit P41 = P4^1; |
|||
sbit P42 = P4^2; |
|||
sbit P43 = P4^3; |
|||
sbit P44 = P4^4; |
|||
sbit P45 = P4^5; |
|||
sbit P46 = P4^6; |
|||
sbit P47 = P4^7; |
|||
sfr WDT_CONTR = 0xC1; |
|||
sfr IAP_DATA = 0xC2; |
|||
sfr IAP_ADDRH = 0xC3; |
|||
sfr IAP_ADDRL = 0xC4; |
|||
sfr IAP_CMD = 0xC5; |
|||
sfr IAP_TRIG = 0xC6; |
|||
sfr IAP_CONTR = 0xC7; |
|||
sfr P5 = 0xC8; |
|||
sbit P50 = P5^0; |
|||
sbit P51 = P5^1; |
|||
sbit P52 = P5^2; |
|||
sbit P53 = P5^3; |
|||
sbit P54 = P5^4; |
|||
sbit P55 = P5^5; |
|||
sbit P56 = P5^6; |
|||
sbit P57 = P5^7; |
|||
sfr P5M1 = 0xC9; |
|||
sfr P5M0 = 0xCA; |
|||
sfr SPSTAT = 0xCD; |
|||
sfr SPCTL = 0xCE; |
|||
sfr SPDAT = 0xCF; |
|||
sfr PSW = 0xD0; |
|||
sbit CY = PSW^7; |
|||
sbit AC = PSW^6; |
|||
sbit F0 = PSW^5; |
|||
sbit RS1 = PSW^4; |
|||
sbit RS0 = PSW^3; |
|||
sbit OV = PSW^2; |
|||
sbit P = PSW^0; |
|||
sfr T4T3M = 0xD1; |
|||
sfr T4H = 0xD2; |
|||
sfr T4L = 0xD3; |
|||
sfr T3H = 0xD4; |
|||
sfr T3L = 0xD5; |
|||
sfr T2H = 0xD6; |
|||
sfr T2L = 0xD7; |
|||
sfr CCON = 0xD8; |
|||
sbit CF = CCON^7; |
|||
sbit CR = CCON^6; |
|||
sbit CCF2 = CCON^2; |
|||
sbit CCF1 = CCON^1; |
|||
sbit CCF0 = CCON^0; |
|||
sfr CMOD = 0xD9; |
|||
sfr CCAPM0 = 0xDA; |
|||
sfr CCAPM1 = 0xDB; |
|||
sfr CCAPM2 = 0xDC; |
|||
sfr ADCCFG = 0xDE; |
|||
sfr IP3 = 0xDF; |
|||
sfr ACC = 0xE0; |
|||
sfr DPS = 0xE3; |
|||
sfr DPL1 = 0xE4; |
|||
sfr DPH1 = 0xE5; |
|||
sfr CMPCR1 = 0xE6; |
|||
sfr CMPCR2 = 0xE7; |
|||
sfr CL = 0xE9; |
|||
sfr CCAP0L = 0xEA; |
|||
sfr CCAP1L = 0xEB; |
|||
sfr CCAP2L = 0xEC; |
|||
sfr IP3H = 0xEE; |
|||
sfr AUXINTIF = 0xEF; |
|||
sfr B = 0xF0; |
|||
sfr PWMSET = 0xF1; |
|||
sfr PCA_PWM0 = 0xF2; |
|||
sfr PCA_PWM1 = 0xF3; |
|||
sfr PCA_PWM2 = 0xF4; |
|||
sfr IAP_TPS = 0xF5; |
|||
sfr PWMCFG01 = 0xF6; |
|||
sfr PWMCFG23 = 0xF7; |
|||
sfr CH = 0xF9; |
|||
sfr CCAP0H = 0xFA; |
|||
sfr CCAP1H = 0xFB; |
|||
sfr CCAP2H = 0xFC; |
|||
sfr PWMCFG45 = 0xFE; |
|||
sfr RSTCFG = 0xFF; |
|||
|
|||
//如下特殊功能寄存器位于扩展RAM区域
|
|||
//访问这些寄存器,需先将P_SW2的BIT7设置为1,才可正常读写
|
|||
|
|||
#define CKSEL (*(unsigned char volatile xdata *)0xFE00) |
|||
#define CLKDIV (*(unsigned char volatile xdata *)0xFE01) |
|||
#define HIRCCR (*(unsigned char volatile xdata *)0xFE02) |
|||
#define XOSCCR (*(unsigned char volatile xdata *)0xFE03) |
|||
#define IRC32KCR (*(unsigned char volatile xdata *)0xFE04) |
|||
#define MCLKOCR (*(unsigned char volatile xdata *)0xFE05) |
|||
#define IRCDB (*(unsigned char volatile xdata *)0xFE06) |
|||
|
|||
#define P0PU (*(unsigned char volatile xdata *)0xFE10) |
|||
#define P1PU (*(unsigned char volatile xdata *)0xFE11) |
|||
#define P2PU (*(unsigned char volatile xdata *)0xFE12) |
|||
#define P3PU (*(unsigned char volatile xdata *)0xFE13) |
|||
#define P4PU (*(unsigned char volatile xdata *)0xFE14) |
|||
#define P5PU (*(unsigned char volatile xdata *)0xFE15) |
|||
#define P0NCS (*(unsigned char volatile xdata *)0xFE18) |
|||
#define P1NCS (*(unsigned char volatile xdata *)0xFE19) |
|||
#define P2NCS (*(unsigned char volatile xdata *)0xFE1A) |
|||
#define P3NCS (*(unsigned char volatile xdata *)0xFE1B) |
|||
#define P4NCS (*(unsigned char volatile xdata *)0xFE1C) |
|||
#define P5NCS (*(unsigned char volatile xdata *)0xFE1D) |
|||
#define P0SR (*(unsigned char volatile xdata *)0xFE20) |
|||
#define P1SR (*(unsigned char volatile xdata *)0xFE21) |
|||
#define P2SR (*(unsigned char volatile xdata *)0xFE22) |
|||
#define P3SR (*(unsigned char volatile xdata *)0xFE23) |
|||
#define P4SR (*(unsigned char volatile xdata *)0xFE24) |
|||
#define P5SR (*(unsigned char volatile xdata *)0xFE25) |
|||
#define P0DR (*(unsigned char volatile xdata *)0xFE28) |
|||
#define P1DR (*(unsigned char volatile xdata *)0xFE29) |
|||
#define P2DR (*(unsigned char volatile xdata *)0xFE2A) |
|||
#define P3DR (*(unsigned char volatile xdata *)0xFE2B) |
|||
#define P4DR (*(unsigned char volatile xdata *)0xFE2C) |
|||
#define P5DR (*(unsigned char volatile xdata *)0xFE2D) |
|||
#define P0IE (*(unsigned char volatile xdata *)0xFE30) |
|||
#define P1IE (*(unsigned char volatile xdata *)0xFE31) |
|||
#define P3IE (*(unsigned char volatile xdata *)0xFE33) |
|||
|
|||
#define I2CCFG (*(unsigned char volatile xdata *)0xFE80) |
|||
#define I2CMSCR (*(unsigned char volatile xdata *)0xFE81) |
|||
#define I2CMSST (*(unsigned char volatile xdata *)0xFE82) |
|||
#define I2CSLCR (*(unsigned char volatile xdata *)0xFE83) |
|||
#define I2CSLST (*(unsigned char volatile xdata *)0xFE84) |
|||
#define I2CSLADR (*(unsigned char volatile xdata *)0xFE85) |
|||
#define I2CTXD (*(unsigned char volatile xdata *)0xFE86) |
|||
#define I2CRXD (*(unsigned char volatile xdata *)0xFE87) |
|||
#define I2CMSAUX (*(unsigned char volatile xdata *)0xFE88) |
|||
|
|||
#define TM2PS (*(unsigned char volatile xdata *)0xFEA2) |
|||
#define TM3PS (*(unsigned char volatile xdata *)0xFEA3) |
|||
#define TM4PS (*(unsigned char volatile xdata *)0xFEA4) |
|||
#define ADCTIM (*(unsigned char volatile xdata *)0xFEA8) |
|||
|
|||
#define PWM0CH (*(unsigned char volatile xdata *)0xFF00) |
|||
#define PWM0CL (*(unsigned char volatile xdata *)0xFF01) |
|||
#define PWM0CKS (*(unsigned char volatile xdata *)0xFF02) |
|||
#define PWM0TADCH (*(unsigned char volatile xdata *)0xFF03) |
|||
#define PWM0TADCL (*(unsigned char volatile xdata *)0xFF04) |
|||
#define PWM0IF (*(unsigned char volatile xdata *)0xFF05) |
|||
#define PWM0FDCR (*(unsigned char volatile xdata *)0xFF06) |
|||
#define PWM00T1H (*(unsigned char volatile xdata *)0xFF10) |
|||
#define PWM00T1L (*(unsigned char volatile xdata *)0xFF11) |
|||
#define PWM00T2H (*(unsigned char volatile xdata *)0xFF12) |
|||
#define PWM00T2L (*(unsigned char volatile xdata *)0xFF13) |
|||
#define PWM00CR (*(unsigned char volatile xdata *)0xFF14) |
|||
#define PWM00HLD (*(unsigned char volatile xdata *)0xFF15) |
|||
#define PWM01T1H (*(unsigned char volatile xdata *)0xFF18) |
|||
#define PWM01T1L (*(unsigned char volatile xdata *)0xFF19) |
|||
#define PWM01T2H (*(unsigned char volatile xdata *)0xFF1A) |
|||
#define PWM01T2L (*(unsigned char volatile xdata *)0xFF1B) |
|||
#define PWM01CR (*(unsigned char volatile xdata *)0xFF1C) |
|||
#define PWM01HLD (*(unsigned char volatile xdata *)0xFF1D) |
|||
#define PWM02T1H (*(unsigned char volatile xdata *)0xFF20) |
|||
#define PWM02T1L (*(unsigned char volatile xdata *)0xFF21) |
|||
#define PWM02T2H (*(unsigned char volatile xdata *)0xFF22) |
|||
#define PWM02T2L (*(unsigned char volatile xdata *)0xFF23) |
|||
#define PWM02CR (*(unsigned char volatile xdata *)0xFF24) |
|||
#define PWM02HLD (*(unsigned char volatile xdata *)0xFF25) |
|||
#define PWM03T1H (*(unsigned char volatile xdata *)0xFF28) |
|||
#define PWM03T1L (*(unsigned char volatile xdata *)0xFF29) |
|||
#define PWM03T2H (*(unsigned char volatile xdata *)0xFF2A) |
|||
#define PWM03T2L (*(unsigned char volatile xdata *)0xFF2B) |
|||
#define PWM03CR (*(unsigned char volatile xdata *)0xFF2C) |
|||
#define PWM03HLD (*(unsigned char volatile xdata *)0xFF2D) |
|||
#define PWM04T1H (*(unsigned char volatile xdata *)0xFF30) |
|||
#define PWM04T1L (*(unsigned char volatile xdata *)0xFF31) |
|||
#define PWM04T2H (*(unsigned char volatile xdata *)0xFF32) |
|||
#define PWM04T2L (*(unsigned char volatile xdata *)0xFF33) |
|||
#define PWM04CR (*(unsigned char volatile xdata *)0xFF34) |
|||
#define PWM04HLD (*(unsigned char volatile xdata *)0xFF35) |
|||
#define PWM05T1H (*(unsigned char volatile xdata *)0xFF38) |
|||
#define PWM05T1L (*(unsigned char volatile xdata *)0xFF39) |
|||
#define PWM05T2H (*(unsigned char volatile xdata *)0xFF3A) |
|||
#define PWM05T2L (*(unsigned char volatile xdata *)0xFF3B) |
|||
#define PWM05CR (*(unsigned char volatile xdata *)0xFF3C) |
|||
#define PWM05HLD (*(unsigned char volatile xdata *)0xFF3D) |
|||
#define PWM06T1H (*(unsigned char volatile xdata *)0xFF40) |
|||
#define PWM06T1L (*(unsigned char volatile xdata *)0xFF41) |
|||
#define PWM06T2H (*(unsigned char volatile xdata *)0xFF42) |
|||
#define PWM06T2L (*(unsigned char volatile xdata *)0xFF43) |
|||
#define PWM06CR (*(unsigned char volatile xdata *)0xFF44) |
|||
#define PWM06HLD (*(unsigned char volatile xdata *)0xFF45) |
|||
#define PWM07T1H (*(unsigned char volatile xdata *)0xFF48) |
|||
#define PWM07T1L (*(unsigned char volatile xdata *)0xFF49) |
|||
#define PWM07T2H (*(unsigned char volatile xdata *)0xFF4A) |
|||
#define PWM07T2L (*(unsigned char volatile xdata *)0xFF4B) |
|||
#define PWM07CR (*(unsigned char volatile xdata *)0xFF4C) |
|||
#define PWM07HLD (*(unsigned char volatile xdata *)0xFF4D) |
|||
#define PWM1CH (*(unsigned char volatile xdata *)0xFF50) |
|||
#define PWM1CL (*(unsigned char volatile xdata *)0xFF51) |
|||
#define PWM1CKS (*(unsigned char volatile xdata *)0xFF52) |
|||
#define PWM1IF (*(unsigned char volatile xdata *)0xFF55) |
|||
#define PWM1FDCR (*(unsigned char volatile xdata *)0xFF56) |
|||
#define PWM10T1H (*(unsigned char volatile xdata *)0xFF60) |
|||
#define PWM10T1L (*(unsigned char volatile xdata *)0xFF61) |
|||
#define PWM10T2H (*(unsigned char volatile xdata *)0xFF62) |
|||
#define PWM10T2L (*(unsigned char volatile xdata *)0xFF63) |
|||
#define PWM10CR (*(unsigned char volatile xdata *)0xFF64) |
|||
#define PWM10HLD (*(unsigned char volatile xdata *)0xFF65) |
|||
#define PWM11T1H (*(unsigned char volatile xdata *)0xFF68) |
|||
#define PWM11T1L (*(unsigned char volatile xdata *)0xFF69) |
|||
#define PWM11T2H (*(unsigned char volatile xdata *)0xFF6A) |
|||
#define PWM11T2L (*(unsigned char volatile xdata *)0xFF6B) |
|||
#define PWM11CR (*(unsigned char volatile xdata *)0xFF6C) |
|||
#define PWM11HLD (*(unsigned char volatile xdata *)0xFF6D) |
|||
#define PWM12T1H (*(unsigned char volatile xdata *)0xFF70) |
|||
#define PWM12T1L (*(unsigned char volatile xdata *)0xFF71) |
|||
#define PWM12T2H (*(unsigned char volatile xdata *)0xFF72) |
|||
#define PWM12T2L (*(unsigned char volatile xdata *)0xFF73) |
|||
#define PWM12CR (*(unsigned char volatile xdata *)0xFF74) |
|||
#define PWM12HLD (*(unsigned char volatile xdata *)0xFF75) |
|||
#define PWM13T1H (*(unsigned char volatile xdata *)0xFF78) |
|||
#define PWM13T1L (*(unsigned char volatile xdata *)0xFF79) |
|||
#define PWM13T2H (*(unsigned char volatile xdata *)0xFF7A) |
|||
#define PWM13T2L (*(unsigned char volatile xdata *)0xFF7B) |
|||
#define PWM13CR (*(unsigned char volatile xdata *)0xFF7C) |
|||
#define PWM13HLD (*(unsigned char volatile xdata *)0xFF7D) |
|||
#define PWM14T1H (*(unsigned char volatile xdata *)0xFF80) |
|||
#define PWM14T1L (*(unsigned char volatile xdata *)0xFF81) |
|||
#define PWM14T2H (*(unsigned char volatile xdata *)0xFF82) |
|||
#define PWM14T2L (*(unsigned char volatile xdata *)0xFF83) |
|||
#define PWM14CR (*(unsigned char volatile xdata *)0xFF84) |
|||
#define PWM14HLD (*(unsigned char volatile xdata *)0xFF85) |
|||
#define PWM15T1H (*(unsigned char volatile xdata *)0xFF88) |
|||
#define PWM15T1L (*(unsigned char volatile xdata *)0xFF89) |
|||
#define PWM15T2H (*(unsigned char volatile xdata *)0xFF8A) |
|||
#define PWM15T2L (*(unsigned char volatile xdata *)0xFF8B) |
|||
#define PWM15CR (*(unsigned char volatile xdata *)0xFF8C) |
|||
#define PWM15HLD (*(unsigned char volatile xdata *)0xFF8D) |
|||
#define PWM16T1H (*(unsigned char volatile xdata *)0xFF90) |
|||
#define PWM16T1L (*(unsigned char volatile xdata *)0xFF91) |
|||
#define PWM16T2H (*(unsigned char volatile xdata *)0xFF92) |
|||
#define PWM16T2L (*(unsigned char volatile xdata *)0xFF93) |
|||
#define PWM16CR (*(unsigned char volatile xdata *)0xFF94) |
|||
#define PWM16HLD (*(unsigned char volatile xdata *)0xFF95) |
|||
#define PWM17T1H (*(unsigned char volatile xdata *)0xFF98) |
|||
#define PWM17T1L (*(unsigned char volatile xdata *)0xFF99) |
|||
#define PWM17T2H (*(unsigned char volatile xdata *)0xFF9A) |
|||
#define PWM17T2L (*(unsigned char volatile xdata *)0xFF9B) |
|||
#define PWM17CR (*(unsigned char volatile xdata *)0xFF9C) |
|||
#define PWM17HLD (*(unsigned char volatile xdata *)0xFF9D) |
|||
#define PWM2CH (*(unsigned char volatile xdata *)0xFFA0) |
|||
#define PWM2CL (*(unsigned char volatile xdata *)0xFFA1) |
|||
#define PWM2CKS (*(unsigned char volatile xdata *)0xFFA2) |
|||
#define PWM2TADCH (*(unsigned char volatile xdata *)0xFFA3) |
|||
#define PWM2TADCL (*(unsigned char volatile xdata *)0xFFA4) |
|||
#define PWM2IF (*(unsigned char volatile xdata *)0xFFA5) |
|||
#define PWM2FDCR (*(unsigned char volatile xdata *)0xFFA6) |
|||
#define PWM20T1H (*(unsigned char volatile xdata *)0xFFB0) |
|||
#define PWM20T1L (*(unsigned char volatile xdata *)0xFFB1) |
|||
#define PWM20T2H (*(unsigned char volatile xdata *)0xFFB2) |
|||
#define PWM20T2L (*(unsigned char volatile xdata *)0xFFB3) |
|||
#define PWM20CR (*(unsigned char volatile xdata *)0xFFB4) |
|||
#define PWM20HLD (*(unsigned char volatile xdata *)0xFFB5) |
|||
#define PWM21T1H (*(unsigned char volatile xdata *)0xFFB8) |
|||
#define PWM21T1L (*(unsigned char volatile xdata *)0xFFB9) |
|||
#define PWM21T2H (*(unsigned char volatile xdata *)0xFFBA) |
|||
#define PWM21T2L (*(unsigned char volatile xdata *)0xFFBB) |
|||
#define PWM21CR (*(unsigned char volatile xdata *)0xFFBC) |
|||
#define PWM21HLD (*(unsigned char volatile xdata *)0xFFBD) |
|||
#define PWM22T1H (*(unsigned char volatile xdata *)0xFFC0) |
|||
#define PWM22T1L (*(unsigned char volatile xdata *)0xFFC1) |
|||
#define PWM22T2H (*(unsigned char volatile xdata *)0xFFC2) |
|||
#define PWM22T2L (*(unsigned char volatile xdata *)0xFFC3) |
|||
#define PWM22CR (*(unsigned char volatile xdata *)0xFFC4) |
|||
#define PWM22HLD (*(unsigned char volatile xdata *)0xFFC5) |
|||
#define PWM23T1H (*(unsigned char volatile xdata *)0xFFC8) |
|||
#define PWM23T1L (*(unsigned char volatile xdata *)0xFFC9) |
|||
#define PWM23T2H (*(unsigned char volatile xdata *)0xFFCA) |
|||
#define PWM23T2L (*(unsigned char volatile xdata *)0xFFCB) |
|||
#define PWM23CR (*(unsigned char volatile xdata *)0xFFCC) |
|||
#define PWM23HLD (*(unsigned char volatile xdata *)0xFFCD) |
|||
#define PWM24T1H (*(unsigned char volatile xdata *)0xFFD0) |
|||
#define PWM24T1L (*(unsigned char volatile xdata *)0xFFD1) |
|||
#define PWM24T2H (*(unsigned char volatile xdata *)0xFFD2) |
|||
#define PWM24T2L (*(unsigned char volatile xdata *)0xFFD3) |
|||
#define PWM24CR (*(unsigned char volatile xdata *)0xFFD4) |
|||
#define PWM24HLD (*(unsigned char volatile xdata *)0xFFD5) |
|||
#define PWM25T1H (*(unsigned char volatile xdata *)0xFFD8) |
|||
#define PWM25T1L (*(unsigned char volatile xdata *)0xFFD9) |
|||
#define PWM25T2H (*(unsigned char volatile xdata *)0xFFDA) |
|||
#define PWM25T2L (*(unsigned char volatile xdata *)0xFFDB) |
|||
#define PWM25CR (*(unsigned char volatile xdata *)0xFFDC) |
|||
#define PWM25HLD (*(unsigned char volatile xdata *)0xFFDD) |
|||
#define PWM26T1H (*(unsigned char volatile xdata *)0xFFE0) |
|||
#define PWM26T1L (*(unsigned char volatile xdata *)0xFFE1) |
|||
#define PWM26T2H (*(unsigned char volatile xdata *)0xFFE2) |
|||
#define PWM26T2L (*(unsigned char volatile xdata *)0xFFE3) |
|||
#define PWM26CR (*(unsigned char volatile xdata *)0xFFE4) |
|||
#define PWM26HLD (*(unsigned char volatile xdata *)0xFFE5) |
|||
#define PWM27T1H (*(unsigned char volatile xdata *)0xFFE8) |
|||
#define PWM27T1L (*(unsigned char volatile xdata *)0xFFE9) |
|||
#define PWM27T2H (*(unsigned char volatile xdata *)0xFFEA) |
|||
#define PWM27T2L (*(unsigned char volatile xdata *)0xFFEB) |
|||
#define PWM27CR (*(unsigned char volatile xdata *)0xFFEC) |
|||
#define PWM27HLD (*(unsigned char volatile xdata *)0xFFED) |
|||
#define PWM3CH (*(unsigned char volatile xdata *)0xFC00) |
|||
#define PWM3CL (*(unsigned char volatile xdata *)0xFC01) |
|||
#define PWM3CKS (*(unsigned char volatile xdata *)0xFC02) |
|||
#define PWM3IF (*(unsigned char volatile xdata *)0xFC05) |
|||
#define PWM3FDCR (*(unsigned char volatile xdata *)0xFC06) |
|||
#define PWM30T1H (*(unsigned char volatile xdata *)0xFC10) |
|||
#define PWM30T1L (*(unsigned char volatile xdata *)0xFC11) |
|||
#define PWM30T2H (*(unsigned char volatile xdata *)0xFC12) |
|||
#define PWM30T2L (*(unsigned char volatile xdata *)0xFC13) |
|||
#define PWM30CR (*(unsigned char volatile xdata *)0xFC14) |
|||
#define PWM30HLD (*(unsigned char volatile xdata *)0xFC15) |
|||
#define PWM31T1H (*(unsigned char volatile xdata *)0xFC18) |
|||
#define PWM31T1L (*(unsigned char volatile xdata *)0xFC19) |
|||
#define PWM31T2H (*(unsigned char volatile xdata *)0xFC1A) |
|||
#define PWM31T2L (*(unsigned char volatile xdata *)0xFC1B) |
|||
#define PWM31CR (*(unsigned char volatile xdata *)0xFC1C) |
|||
#define PWM31HLD (*(unsigned char volatile xdata *)0xFC1D) |
|||
#define PWM32T1H (*(unsigned char volatile xdata *)0xFC20) |
|||
#define PWM32T1L (*(unsigned char volatile xdata *)0xFC21) |
|||
#define PWM32T2H (*(unsigned char volatile xdata *)0xFC22) |
|||
#define PWM32T2L (*(unsigned char volatile xdata *)0xFC23) |
|||
#define PWM32CR (*(unsigned char volatile xdata *)0xFC24) |
|||
#define PWM32HLD (*(unsigned char volatile xdata *)0xFC25) |
|||
#define PWM33T1H (*(unsigned char volatile xdata *)0xFC28) |
|||
#define PWM33T1L (*(unsigned char volatile xdata *)0xFC29) |
|||
#define PWM33T2H (*(unsigned char volatile xdata *)0xFC2A) |
|||
#define PWM33T2L (*(unsigned char volatile xdata *)0xFC2B) |
|||
#define PWM33CR (*(unsigned char volatile xdata *)0xFC2C) |
|||
#define PWM33HLD (*(unsigned char volatile xdata *)0xFC2D) |
|||
#define PWM34T1H (*(unsigned char volatile xdata *)0xFC30) |
|||
#define PWM34T1L (*(unsigned char volatile xdata *)0xFC31) |
|||
#define PWM34T2H (*(unsigned char volatile xdata *)0xFC32) |
|||
#define PWM34T2L (*(unsigned char volatile xdata *)0xFC33) |
|||
#define PWM34CR (*(unsigned char volatile xdata *)0xFC34) |
|||
#define PWM34HLD (*(unsigned char volatile xdata *)0xFC35) |
|||
#define PWM35T1H (*(unsigned char volatile xdata *)0xFC38) |
|||
#define PWM35T1L (*(unsigned char volatile xdata *)0xFC39) |
|||
#define PWM35T2H (*(unsigned char volatile xdata *)0xFC3A) |
|||
#define PWM35T2L (*(unsigned char volatile xdata *)0xFC3B) |
|||
#define PWM35CR (*(unsigned char volatile xdata *)0xFC3C) |
|||
#define PWM35HLD (*(unsigned char volatile xdata *)0xFC3D) |
|||
#define PWM36T1H (*(unsigned char volatile xdata *)0xFC40) |
|||
#define PWM36T1L (*(unsigned char volatile xdata *)0xFC41) |
|||
#define PWM36T2H (*(unsigned char volatile xdata *)0xFC42) |
|||
#define PWM36T2L (*(unsigned char volatile xdata *)0xFC43) |
|||
#define PWM36CR (*(unsigned char volatile xdata *)0xFC44) |
|||
#define PWM36HLD (*(unsigned char volatile xdata *)0xFC45) |
|||
#define PWM37T1H (*(unsigned char volatile xdata *)0xFC48) |
|||
#define PWM37T1L (*(unsigned char volatile xdata *)0xFC49) |
|||
#define PWM37T2H (*(unsigned char volatile xdata *)0xFC4A) |
|||
#define PWM37T2L (*(unsigned char volatile xdata *)0xFC4B) |
|||
#define PWM37CR (*(unsigned char volatile xdata *)0xFC4C) |
|||
#define PWM37HLD (*(unsigned char volatile xdata *)0xFC4D) |
|||
#define PWM4CH (*(unsigned char volatile xdata *)0xFC50) |
|||
#define PWM4CL (*(unsigned char volatile xdata *)0xFC51) |
|||
#define PWM4CKS (*(unsigned char volatile xdata *)0xFC52) |
|||
#define PWM4TADCH (*(unsigned char volatile xdata *)0xFC53) |
|||
#define PWM4TADCL (*(unsigned char volatile xdata *)0xFC54) |
|||
#define PWM4IF (*(unsigned char volatile xdata *)0xFC55) |
|||
#define PWM4FDCR (*(unsigned char volatile xdata *)0xFC56) |
|||
#define PWM40T1H (*(unsigned char volatile xdata *)0xFC60) |
|||
#define PWM40T1L (*(unsigned char volatile xdata *)0xFC61) |
|||
#define PWM40T2H (*(unsigned char volatile xdata *)0xFC62) |
|||
#define PWM40T2L (*(unsigned char volatile xdata *)0xFC63) |
|||
#define PWM40CR (*(unsigned char volatile xdata *)0xFC64) |
|||
#define PWM40HLD (*(unsigned char volatile xdata *)0xFC65) |
|||
#define PWM41T1H (*(unsigned char volatile xdata *)0xFC68) |
|||
#define PWM41T1L (*(unsigned char volatile xdata *)0xFC69) |
|||
#define PWM41T2H (*(unsigned char volatile xdata *)0xFC6A) |
|||
#define PWM41T2L (*(unsigned char volatile xdata *)0xFC6B) |
|||
#define PWM41CR (*(unsigned char volatile xdata *)0xFC6C) |
|||
#define PWM41HLD (*(unsigned char volatile xdata *)0xFC6D) |
|||
#define PWM42T1H (*(unsigned char volatile xdata *)0xFC70) |
|||
#define PWM42T1L (*(unsigned char volatile xdata *)0xFC71) |
|||
#define PWM42T2H (*(unsigned char volatile xdata *)0xFC72) |
|||
#define PWM42T2L (*(unsigned char volatile xdata *)0xFC73) |
|||
#define PWM42CR (*(unsigned char volatile xdata *)0xFC74) |
|||
#define PWM42HLD (*(unsigned char volatile xdata *)0xFC75) |
|||
#define PWM43T1H (*(unsigned char volatile xdata *)0xFC78) |
|||
#define PWM43T1L (*(unsigned char volatile xdata *)0xFC79) |
|||
#define PWM43T2H (*(unsigned char volatile xdata *)0xFC7A) |
|||
#define PWM43T2L (*(unsigned char volatile xdata *)0xFC7B) |
|||
#define PWM43CR (*(unsigned char volatile xdata *)0xFC7C) |
|||
#define PWM43HLD (*(unsigned char volatile xdata *)0xFC7D) |
|||
#define PWM44T1H (*(unsigned char volatile xdata *)0xFC80) |
|||
#define PWM44T1L (*(unsigned char volatile xdata *)0xFC81) |
|||
#define PWM44T2H (*(unsigned char volatile xdata *)0xFC82) |
|||
#define PWM44T2L (*(unsigned char volatile xdata *)0xFC83) |
|||
#define PWM44CR (*(unsigned char volatile xdata *)0xFC84) |
|||
#define PWM44HLD (*(unsigned char volatile xdata *)0xFC85) |
|||
#define PWM45T1H (*(unsigned char volatile xdata *)0xFC88) |
|||
#define PWM45T1L (*(unsigned char volatile xdata *)0xFC89) |
|||
#define PWM45T2H (*(unsigned char volatile xdata *)0xFC8A) |
|||
#define PWM45T2L (*(unsigned char volatile xdata *)0xFC8B) |
|||
#define PWM45CR (*(unsigned char volatile xdata *)0xFC8C) |
|||
#define PWM45HLD (*(unsigned char volatile xdata *)0xFC8D) |
|||
#define PWM46T1H (*(unsigned char volatile xdata *)0xFC90) |
|||
#define PWM46T1L (*(unsigned char volatile xdata *)0xFC91) |
|||
#define PWM46T2H (*(unsigned char volatile xdata *)0xFC92) |
|||
#define PWM46T2L (*(unsigned char volatile xdata *)0xFC93) |
|||
#define PWM46CR (*(unsigned char volatile xdata *)0xFC94) |
|||
#define PWM46HLD (*(unsigned char volatile xdata *)0xFC95) |
|||
#define PWM47T1H (*(unsigned char volatile xdata *)0xFC98) |
|||
#define PWM47T1L (*(unsigned char volatile xdata *)0xFC99) |
|||
#define PWM47T2H (*(unsigned char volatile xdata *)0xFC9A) |
|||
#define PWM47T2L (*(unsigned char volatile xdata *)0xFC9B) |
|||
#define PWM47CR (*(unsigned char volatile xdata *)0xFC9C) |
|||
#define PWM47HLD (*(unsigned char volatile xdata *)0xFC9D) |
|||
#define PWM5CH (*(unsigned char volatile xdata *)0xFCA0) |
|||
#define PWM5CL (*(unsigned char volatile xdata *)0xFCA1) |
|||
#define PWM5CKS (*(unsigned char volatile xdata *)0xFCA2) |
|||
#define PWM5IF (*(unsigned char volatile xdata *)0xFCA5) |
|||
#define PWM5FDCR (*(unsigned char volatile xdata *)0xFCA6) |
|||
#define PWM50T1H (*(unsigned char volatile xdata *)0xFCB0) |
|||
#define PWM50T1L (*(unsigned char volatile xdata *)0xFCB1) |
|||
#define PWM50T2H (*(unsigned char volatile xdata *)0xFCB2) |
|||
#define PWM50T2L (*(unsigned char volatile xdata *)0xFCB3) |
|||
#define PWM50CR (*(unsigned char volatile xdata *)0xFCB4) |
|||
#define PWM50HLD (*(unsigned char volatile xdata *)0xFCB5) |
|||
#define PWM51T1H (*(unsigned char volatile xdata *)0xFCB8) |
|||
#define PWM51T1L (*(unsigned char volatile xdata *)0xFCB9) |
|||
#define PWM51T2H (*(unsigned char volatile xdata *)0xFCBA) |
|||
#define PWM51T2L (*(unsigned char volatile xdata *)0xFCBB) |
|||
#define PWM51CR (*(unsigned char volatile xdata *)0xFCBC) |
|||
#define PWM51HLD (*(unsigned char volatile xdata *)0xFCBD) |
|||
#define PWM52T1H (*(unsigned char volatile xdata *)0xFCC0) |
|||
#define PWM52T1L (*(unsigned char volatile xdata *)0xFCC1) |
|||
#define PWM52T2H (*(unsigned char volatile xdata *)0xFCC2) |
|||
#define PWM52T2L (*(unsigned char volatile xdata *)0xFCC3) |
|||
#define PWM52CR (*(unsigned char volatile xdata *)0xFCC4) |
|||
#define PWM52HLD (*(unsigned char volatile xdata *)0xFCC5) |
|||
#define PWM53T1H (*(unsigned char volatile xdata *)0xFCC8) |
|||
#define PWM53T1L (*(unsigned char volatile xdata *)0xFCC9) |
|||
#define PWM53T2H (*(unsigned char volatile xdata *)0xFCCA) |
|||
#define PWM53T2L (*(unsigned char volatile xdata *)0xFCCB) |
|||
#define PWM53CR (*(unsigned char volatile xdata *)0xFCCC) |
|||
#define PWM53HLD (*(unsigned char volatile xdata *)0xFCCD) |
|||
#define PWM54T1H (*(unsigned char volatile xdata *)0xFCD0) |
|||
#define PWM54T1L (*(unsigned char volatile xdata *)0xFCD1) |
|||
#define PWM54T2H (*(unsigned char volatile xdata *)0xFCD2) |
|||
#define PWM54T2L (*(unsigned char volatile xdata *)0xFCD3) |
|||
#define PWM54CR (*(unsigned char volatile xdata *)0xFCD4) |
|||
#define PWM54HLD (*(unsigned char volatile xdata *)0xFCD5) |
|||
#define PWM55T1H (*(unsigned char volatile xdata *)0xFCD8) |
|||
#define PWM55T1L (*(unsigned char volatile xdata *)0xFCD9) |
|||
#define PWM55T2H (*(unsigned char volatile xdata *)0xFCDA) |
|||
#define PWM55T2L (*(unsigned char volatile xdata *)0xFCDB) |
|||
#define PWM55CR (*(unsigned char volatile xdata *)0xFCDC) |
|||
#define PWM55HLD (*(unsigned char volatile xdata *)0xFCDD) |
|||
#define PWM56T1H (*(unsigned char volatile xdata *)0xFCE0) |
|||
#define PWM56T1L (*(unsigned char volatile xdata *)0xFCE1) |
|||
#define PWM56T2H (*(unsigned char volatile xdata *)0xFCE2) |
|||
#define PWM56T2L (*(unsigned char volatile xdata *)0xFCE3) |
|||
#define PWM56CR (*(unsigned char volatile xdata *)0xFCE4) |
|||
#define PWM56HLD (*(unsigned char volatile xdata *)0xFCE5) |
|||
#define PWM57T1H (*(unsigned char volatile xdata *)0xFCE8) |
|||
#define PWM57T1L (*(unsigned char volatile xdata *)0xFCE9) |
|||
#define PWM57T2H (*(unsigned char volatile xdata *)0xFCEA) |
|||
#define PWM57T2L (*(unsigned char volatile xdata *)0xFCEB) |
|||
#define PWM57CR (*(unsigned char volatile xdata *)0xFCEC) |
|||
#define PWM57HLD (*(unsigned char volatile xdata *)0xFCED) |
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
|
|||
/// >>>>> add by cc
|
|||
|
|||
#include "../clib/bit.h" |
|||
|
|||
#define D_stdIO_P0_ALL() P0M1=0;P0M0=0; |
|||
#define D_HighI_P0_ALL() P0M1=0;P0M0=0XFF; |
|||
#define D_HighR_P0_ALL() P0M1=0XFF;P0M0=0; |
|||
#define D_OpenD_P0_ALL() P0M1=0XFF;P0M0=0XFF; |
|||
|
|||
#define D_stdIO_P1_ALL() P1M1=0;P1M0=0; |
|||
#define D_HighI_P1_ALL() P1M1=0;P1M0=0XFF; |
|||
#define D_HighR_P1_ALL() P1M1=0XFF;P1M0=0; |
|||
#define D_OpenD_P1_ALL() P1M1=0XFF;P1M0=0XFF; |
|||
|
|||
|
|||
#define D_stdIO_P0(n) BITN_0(P0M1,n);BITN_0(P0M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P0(n) BITN_0(P0M1,n);BITN_1(P0M0,n); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P0(n) BITN_1(P0M1,n);BITN_0(P0M0,n); /////////10 高阻
|
|||
#define D_OpenD_P0(n) BITN_1(P0M1,n);BITN_1(P0M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P1(n) BITN_0(P1M1,n);BITN_0(P1M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P1(n) BITN_0(P1M1,n);BITN_1(P1M0,n); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P1(n) BITN_1(P1M1,n);BITN_0(P1M0,n); /////////10 高阻
|
|||
#define D_OpenD_P1(n) BITN_1(P1M1,n);BITN_1(P1M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P2(n) BITN_0(P2M1,n);BITN_0(P2M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P2(n) BITN_0(P2M1,n);BITN_1(P2M0,n); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P2(n) BITN_1(P2M1,n);BITN_0(P2M0,n); /////////10 高阻
|
|||
#define D_OpenD_P2(n) BITN_1(P2M1,n);BITN_1(P2M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P3(n) BITN_0(P3M1,n);BITN_0(P3M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P3(n) BITN_0(P3M1,n);BITN_1(P3M0,n); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P3(n) BITN_1(P3M1,n);BITN_0(P3M0,n); /////////10 高阻
|
|||
#define D_OpenD_P3(n) BITN_1(P3M1,n);BITN_1(P3M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P4(n) BITN_0(P4M1,n);BITN_0(P4M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P4(n) BITN_0(P4M1,n);BITN_1(P4M0,n); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P4(n) BITN_1(P4M1,n);BITN_0(P4M0,n); /////////10 高阻
|
|||
#define D_OpenD_P4(n) BITN_1(P4M1,n);BITN_1(P4M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P5(n) BITN_0(P5M1,n);BITN_0(P5M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P5(n) BITN_0(P5M1,n);BITN_1(P5M0,n); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P5(n) BITN_1(P5M1,n);BITN_0(P5M0,n); /////////10 高阻
|
|||
#define D_OpenD_P5(n) BITN_1(P5M1,n);BITN_1(P5M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P6(n) BITN_0(P6M1,n);BITN_0(P6M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P6(n) BITN_0(P6M1,n);BITN_1(P6M0,n); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P6(n) BITN_1(P6M1,n);BITN_0(P6M0,n); /////////10 高阻
|
|||
#define D_OpenD_P6(n) BITN_1(P6M1,n);BITN_1(P6M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
#define D_stdIO_P7(n) BITN_0(P7M1,n);BITN_0(P7M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS
|
|||
#define D_HighI_P7(n) BITN_0(P7M1,n);BITN_1(P7M0,n); //////01 推挽输出 20mA 加限流
|
|||
#define D_HighR_P7(n) BITN_1(P7M1,n);BITN_0(P7M0,n); /////////10 高阻
|
|||
#define D_OpenD_P7(n) BITN_1(P7M1,n);BITN_1(P7M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平
|
|||
|
|||
/***
|
|||
|
|||
#define P0_conf_in(n) BITN_1(P0M1,n);BITN_0(P0M0,n); |
|||
#define P1_conf_in(n) BITN_1(P1M1,n);BITN_0(P1M0,n); |
|||
#define P2_conf_in(n) BITN_1(P2M1,n);BITN_0(P2M0,n); |
|||
#define P2_conf_port(n) BITN_0(P2M1,n);BITN_0(P2M0,n); |
|||
|
|||
|
|||
#define P3_conf_in(n) BITN_1(P3M1,n);BITN_0(P3M0,n); |
|||
#define P3_conf_port(n) BITN_0(P3M1,n);BITN_0(P3M0,n); |
|||
|
|||
#define P4_conf_in(n) BITN_1(P4M1,n);BITN_0(P4M0,n); |
|||
#define P5_conf_in(n) BITN_1(P5M1,n);BITN_0(P5M0,n); |
|||
|
|||
***/ |
|||
|
|||
|
|||
|
|||
#define NOP() _nop_() |
|||
|
|||
#define L0_INT4_OPEN() BITN_1(INT_CLKO, INT_EX4) |
|||
#define L0_INT4_CLOSE() BITN_0(INT_CLKO, INT_EX4) |
|||
|
|||
#define L0_INT4_AT() BITN_G(INT_CLKO, INT_EX4) |
|||
|
|||
|
|||
|
|||
|
|||
#define L0_INT4_CLEAR() BITN_0(AUXINTIF, INT4IF) |
|||
#define L0_INT3_CLEAR() BITN_0(AUXINTIF, INT3IF) |
|||
#define L0_INT2_CLEAR() BITN_0(AUXINTIF, INT2IF) |
|||
|
|||
|
|||
|
|||
|
|||
//////
|
|||
|
|||
#define L0_INT3_OPEN() BITN_1(INT_CLKO, INT_EX3); |
|||
#define L0_INT3_CLOSE() BITN_0(INT_CLKO, INT_EX3); |
|||
#define L0_INT2_OPEN() BITN_1(INT_CLKO, INT_EX2); |
|||
#define L0_INT2_CLOSE() BITN_0(INT_CLKO, INT_EX2); |
|||
#define L0_INT1_OPEN() EX1 = 1; |
|||
#define L0_INT1_CLOSE() EX1 = 0; |
|||
#define L0_INT0_OPEN() EX0 = 1; |
|||
#define L0_INT0_CLOSE() EX0 = 0; |
|||
|
|||
#define D_ISR_int0 0 ///int0 下降沿触发 = 0 上下沿均可触发
|
|||
#define D_ISR_timer0 1 |
|||
#define D_ISR_int1 2 ///int1 下降沿触发 = 0 上下沿均可触发
|
|||
#define D_ISR_timer1 3 |
|||
#define D_ISR_int2 10 /////只有下降沿
|
|||
#define D_ISR_int3 11 /////只有下降沿
|
|||
#define D_SERVE_UART 4 |
|||
#define D_ISR_int4 16 /////只有下降沿
|
|||
|
|||
#if 0 |
|||
#define L0_TIMER1_start() TR1 = 1; |
|||
#define L0_TIMER1_end() TR1 = 0; |
|||
|
|||
|
|||
#define L0_TIMER1_isr_OPEN() ET1 = 1; |
|||
#define L0_TIMER1_isr_CLOSE() ET1 = 0; |
|||
|
|||
|
|||
#else |
|||
|
|||
#define L0_TIMER1_start() ET1 = 1; |
|||
#define L0_TIMER1_end() ET1 = 0; |
|||
|
|||
|
|||
#define L0_TIMER1_isr_OPEN() TR1 = 1; |
|||
#define L0_TIMER1_isr_CLOSE() TR1 = 0; |
|||
|
|||
|
|||
#endif |
|||
|
|||
/// fixme 颠倒定义会让c51锁死#define _nop_() NOP()
|
|||
|
|||
///#define L0_INT3_OPEN() BITN_1(INT_CLKO,INT_EX3); //使能INT3中断
|
|||
///#define L0_INT3_CLOSE() BITN_0(INT_CLKO,INT_EX3);
|
|||
#endif //STC_stc8a8k
|
|||
|
|||
|
|||
|
|||
|
|||
|
|||
|
@ -1,593 +0,0 @@ |
|||
#ifndef __STC8F_H_ |
|||
#define __STC8F_H_ |
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
//包含本头文件后,不用另外再包含"REG51.H"
|
|||
|
|||
//内核特殊功能寄存器
|
|||
sfr ACC = 0xe0; |
|||
sfr B = 0xf0; |
|||
sfr PSW = 0xd0; |
|||
sbit CY = PSW^7; |
|||
sbit AC = PSW^6; |
|||
sbit F0 = PSW^5; |
|||
sbit RS1 = PSW^4; |
|||
sbit RS0 = PSW^3; |
|||
sbit OV = PSW^2; |
|||
sbit F1 = PSW^1; |
|||
sbit P = PSW^0; |
|||
sfr SP = 0x81; |
|||
sfr DPL = 0x82; |
|||
sfr DPH = 0x83; |
|||
sfr TA = 0xae; |
|||
sfr DPS = 0xe3; |
|||
sfr DPL1 = 0xe4; |
|||
sfr DPH1 = 0xe5; |
|||
|
|||
|
|||
//I/O 口特殊功能寄存器
|
|||
sfr P0 = 0x80; |
|||
sfr P1 = 0x90; |
|||
sfr P2 = 0xa0; |
|||
sfr P3 = 0xb0; |
|||
sfr P4 = 0xc0; |
|||
sfr P5 = 0xc8; |
|||
sfr P6 = 0xe8; |
|||
sfr P7 = 0xf8; |
|||
sfr P0M0 = 0x94; |
|||
sfr P0M1 = 0x93; |
|||
sfr P1M0 = 0x92; |
|||
sfr P1M1 = 0x91; |
|||
sfr P2M0 = 0x96; |
|||
sfr P2M1 = 0x95; |
|||
sfr P3M0 = 0xb2; |
|||
sfr P3M1 = 0xb1; |
|||
sfr P4M0 = 0xb4; |
|||
sfr P4M1 = 0xb3; |
|||
sfr P5M0 = 0xca; |
|||
sfr P5M1 = 0xc9; |
|||
sfr P6M0 = 0xcc; |
|||
sfr P6M1 = 0xcb; |
|||
sfr P7M0 = 0xe2; |
|||
sfr P7M1 = 0xe1; |
|||
|
|||
sbit P00 = P0^0; |
|||
sbit P01 = P0^1; |
|||
sbit P02 = P0^2; |
|||
sbit P03 = P0^3; |
|||
sbit P04 = P0^4; |
|||
sbit P05 = P0^5; |
|||
sbit P06 = P0^6; |
|||
sbit P07 = P0^7; |
|||
sbit P10 = P1^0; |
|||
sbit P11 = P1^1; |
|||
sbit P12 = P1^2; |
|||
sbit P13 = P1^3; |
|||
sbit P14 = P1^4; |
|||
sbit P15 = P1^5; |
|||
sbit P16 = P1^6; |
|||
sbit P17 = P1^7; |
|||
sbit P20 = P2^0; |
|||
sbit P21 = P2^1; |
|||
sbit P22 = P2^2; |
|||
sbit P23 = P2^3; |
|||
sbit P24 = P2^4; |
|||
sbit P25 = P2^5; |
|||
sbit P26 = P2^6; |
|||
sbit P27 = P2^7; |
|||
sbit P30 = P3^0; |
|||
sbit P31 = P3^1; |
|||
sbit P32 = P3^2; |
|||
sbit P33 = P3^3; |
|||
sbit P34 = P3^4; |
|||
sbit P35 = P3^5; |
|||
sbit P36 = P3^6; |
|||
sbit P37 = P3^7; |
|||
sbit P40 = P4^0; |
|||
sbit P41 = P4^1; |
|||
sbit P42 = P4^2; |
|||
sbit P43 = P4^3; |
|||
sbit P44 = P4^4; |
|||
sbit P45 = P4^5; |
|||
sbit P46 = P4^6; |
|||
sbit P47 = P4^7; |
|||
sbit P50 = P5^0; |
|||
sbit P51 = P5^1; |
|||
sbit P52 = P5^2; |
|||
sbit P53 = P5^3; |
|||
sbit P54 = P5^4; |
|||
sbit P55 = P5^5; |
|||
sbit P56 = P5^6; |
|||
sbit P57 = P5^7; |
|||
sbit P60 = P6^0; |
|||
sbit P61 = P6^1; |
|||
sbit P62 = P6^2; |
|||
sbit P63 = P6^3; |
|||
sbit P64 = P6^4; |
|||
sbit P65 = P6^5; |
|||
sbit P66 = P6^6; |
|||
sbit P67 = P6^7; |
|||
sbit P70 = P7^0; |
|||
sbit P71 = P7^1; |
|||
sbit P72 = P7^2; |
|||
sbit P73 = P7^3; |
|||
sbit P74 = P7^4; |
|||
sbit P75 = P7^5; |
|||
sbit P76 = P7^6; |
|||
sbit P77 = P7^7; |
|||
|
|||
//如下特殊功能寄存器位于扩展RAM区域
|
|||
//访问这些寄存器,需先将P_SW2的BIT7设置为1,才可正常读写
|
|||
#define P0PU (*(unsigned char volatile xdata *)0xfe10) |
|||
#define P1PU (*(unsigned char volatile xdata *)0xfe11) |
|||
#define P2PU (*(unsigned char volatile xdata *)0xfe12) |
|||
#define P3PU (*(unsigned char volatile xdata *)0xfe13) |
|||
#define P4PU (*(unsigned char volatile xdata *)0xfe14) |
|||
#define P5PU (*(unsigned char volatile xdata *)0xfe15) |
|||
#define P6PU (*(unsigned char volatile xdata *)0xfe16) |
|||
#define P7PU (*(unsigned char volatile xdata *)0xfe17) |
|||
#define P0NCS (*(unsigned char volatile xdata *)0xfe18) |
|||
#define P1NCS (*(unsigned char volatile xdata *)0xfe19) |
|||
#define P2NCS (*(unsigned char volatile xdata *)0xfe1a) |
|||
#define P3NCS (*(unsigned char volatile xdata *)0xfe1b) |
|||
#define P4NCS (*(unsigned char volatile xdata *)0xfe1c) |
|||
#define P5NCS (*(unsigned char volatile xdata *)0xfe1d) |
|||
#define P6NCS (*(unsigned char volatile xdata *)0xfe1e) |
|||
#define P7NCS (*(unsigned char volatile xdata *)0xfe1f) |
|||
|
|||
//系统管理特殊功能寄存器
|
|||
sfr PCON = 0x87; |
|||
#define SMOD 0x80 |
|||
#define SMOD0 0x40 |
|||
#define LVDF 0x20 |
|||
#define POF 0x10 |
|||
#define GF1 0x08 |
|||
#define GF0 0x04 |
|||
#define PD 0x02 |
|||
#define IDL 0x01 |
|||
sfr AUXR = 0x8e; |
|||
#define T0x12 0x80 |
|||
#define T1x12 0x40 |
|||
#define UART_M0x6 0x20 |
|||
#define T2R 0x10 |
|||
#define T2_CT 0x08 |
|||
#define T2x12 0x04 |
|||
#define EXTRAM 0x02 |
|||
#define S1ST2 0x01 |
|||
sfr AUXR2 = 0x97; |
|||
#define TXLNRX 0x10 |
|||
sfr BUS_SPEED = 0xa1; |
|||
sfr P_SW1 = 0xa2; |
|||
sfr P_SW2 = 0xba; |
|||
#define EAXFR 0x80 |
|||
sfr VOCTRL = 0xbb; |
|||
sfr RSTCFG = 0xff; |
|||
|
|||
//如下特殊功能寄存器位于扩展RAM区域
|
|||
//访问这些寄存器,需先将P_SW2的BIT7设置为1,才可正常读写
|
|||
#define CKSEL (*(unsigned char volatile xdata *)0xfe00) |
|||
#define CLKDIV (*(unsigned char volatile xdata *)0xfe01) |
|||
#define IRC24MCR (*(unsigned char volatile xdata *)0xfe02) |
|||
#define XOSCCR (*(unsigned char volatile xdata *)0xfe03) |
|||
#define IRC32KCR (*(unsigned char volatile xdata *)0xfe04) |
|||
|
|||
//中断特殊功能寄存器
|
|||
sfr IE = 0xa8; |
|||
sbit EA = IE^7; |
|||
sbit ELVD = IE^6; |
|||
sbit EADC = IE^5; |
|||
sbit ES = IE^4; |
|||
sbit ET1 = IE^3; |
|||
sbit EX1 = IE^2; |
|||
sbit ET0 = IE^1; |
|||
sbit EX0 = IE^0; |
|||
sfr IE2 = 0xaf; |
|||
#define ET4 0x40 |
|||
#define ET3 0x20 |
|||
#define ES4 0x10 |
|||
#define ES3 0x08 |
|||
#define ET2 0x04 |
|||
#define ESPI 0x02 |
|||
#define ES2 0x01 |
|||
|
|||
sfr IP = 0xb8; |
|||
sbit PPCA = IP^7; |
|||
sbit PLVD = IP^6; |
|||
sbit PADC = IP^5; |
|||
sbit PS = IP^4; |
|||
sbit PT1 = IP^3; |
|||
sbit PX1 = IP^2; |
|||
sbit PT0 = IP^1; |
|||
sbit PX0 = IP^0; |
|||
sfr IP2 = 0xb5; |
|||
#define PI2C 0x40 |
|||
#define PCMP 0x20 |
|||
#define PX4 0x10 |
|||
#define PPWMFD 0x08 |
|||
#define PPWM 0x04 |
|||
#define PSPI 0x02 |
|||
#define PS2 0x01 |
|||
sfr IPH = 0xb7; |
|||
#define PPCAH 0x80 |
|||
#define PLVDH 0x40 |
|||
#define PADCH 0x20 |
|||
#define PSH 0x10 |
|||
#define PT1H 0x08 |
|||
#define PX1H 0x04 |
|||
#define PT0H 0x02 |
|||
#define PX0H 0x01 |
|||
sfr IP2H = 0xb6; |
|||
#define PI2CH 0x40 |
|||
#define PCMPH 0x20 |
|||
#define PX4H 0x10 |
|||
#define PPWMFDH 0x08 |
|||
#define PPWMH 0x04 |
|||
#define PSPIH 0x02 |
|||
#define PS2H 0x01 |
|||
sfr INTCLKO = 0x8f; |
|||
#define EX4 0x40 |
|||
#define EX3 0x20 |
|||
#define EX2 0x10 |
|||
#define T2CLKO 0x04 |
|||
#define T1CLKO 0x02 |
|||
#define T0CLKO 0x01 |
|||
sfr AUXINTIF = 0xef; |
|||
#define INT4IF 0x40 |
|||
#define INT3IF 0x20 |
|||
#define INT2IF 0x10 |
|||
#define T4IF 0x04 |
|||
#define T3IF 0x02 |
|||
#define T2IF 0x01 |
|||
|
|||
//定时器特殊功能寄存器
|
|||
sfr TCON = 0x88; |
|||
sbit TF1 = TCON^7; |
|||
sbit TR1 = TCON^6; |
|||
sbit TF0 = TCON^5; |
|||
sbit TR0 = TCON^4; |
|||
sbit IE1 = TCON^3; |
|||
sbit IT1 = TCON^2; |
|||
sbit IE0 = TCON^1; |
|||
sbit IT0 = TCON^0; |
|||
sfr TMOD = 0x89; |
|||
#define T1_GATE 0x80 |
|||
#define T1_CT 0x40 |
|||
#define T1_M1 0x20 |
|||
#define T1_M0 0x10 |
|||
#define T0_GATE 0x08 |
|||
#define T0_CT 0x04 |
|||
#define T0_M1 0x02 |
|||
#define T0_M0 0x01 |
|||
sfr TL0 = 0x8a; |
|||
sfr TL1 = 0x8b; |
|||
sfr TH0 = 0x8c; |
|||
sfr TH1 = 0x8d; |
|||
sfr T4T3M = 0xd1; |
|||
#define T4R 0x80 |
|||
#define T4_CT 0x40 |
|||
#define T4x12 0x20 |
|||
#define T4CLKO 0x10 |
|||
#define T3R 0x08 |
|||
#define T3_CT 0x04 |
|||
#define T3x12 0x02 |
|||
#define T3CLKO 0x01 |
|||
sfr T4H = 0xd2; |
|||
sfr T4L = 0xd3; |
|||
sfr T3H = 0xd4; |
|||
sfr T3L = 0xd5; |
|||
sfr T2H = 0xd6; |
|||
sfr T2L = 0xd7; |
|||
sfr TH4 = 0xd2; |
|||
sfr TL4 = 0xd3; |
|||
sfr TH3 = 0xd4; |
|||
sfr TL3 = 0xd5; |
|||
sfr TH2 = 0xd6; |
|||
sfr TL2 = 0xd7; |
|||
sfr WKTCL = 0xaa; |
|||
sfr WKTCH = 0xab; |
|||
#define WKTEN 0x80 |
|||
sfr WDT_CONTR = 0xc1; |
|||
#define WDT_FLAG 0x80 |
|||
#define EN_WDT 0x20 |
|||
#define CLR_WDT 0x10 |
|||
#define IDL_WDT 0x08 |
|||
|
|||
//串行口特殊功能寄存器
|
|||
sfr SCON = 0x98; |
|||
sbit SM0 = SCON^7; |
|||
sbit SM1 = SCON^6; |
|||
sbit SM2 = SCON^5; |
|||
sbit REN = SCON^4; |
|||
sbit TB8 = SCON^3; |
|||
sbit RB8 = SCON^2; |
|||
sbit TI = SCON^1; |
|||
sbit RI = SCON^0; |
|||
sfr SBUF = 0x99; |
|||
sfr S2CON = 0x9a; |
|||
#define S2SM0 0x80 |
|||
#define S2ST4 0x40 |
|||
#define S2SM2 0x20 |
|||
#define S2REN 0x10 |
|||
#define S2TB8 0x08 |
|||
#define S2RB8 0x04 |
|||
#define S2TI 0x02 |
|||
#define S2RI 0x01 |
|||
sfr S2BUF = 0x9b; |
|||
sfr S3CON = 0xac; |
|||
#define S3SM0 0x80 |
|||
#define S3ST4 0x40 |
|||
#define S3SM2 0x20 |
|||
#define S3REN 0x10 |
|||
#define S3TB8 0x08 |
|||
#define S3RB8 0x04 |
|||
#define S3TI 0x02 |
|||
#define S3RI 0x01 |
|||
sfr S3BUF = 0xad; |
|||
sfr S4CON = 0x84; |
|||
#define S4SM0 0x80 |
|||
#define S4ST4 0x40 |
|||
#define S4SM2 0x20 |
|||
#define S4REN 0x10 |
|||
#define S4TB8 0x08 |
|||
#define S4RB8 0x04 |
|||
#define S4TI 0x02 |
|||
#define S4RI 0x01 |
|||
sfr S4BUF = 0x85; |
|||
sfr SADDR = 0xa9; |
|||
sfr SADEN = 0xb9; |
|||
|
|||
//ADC 特殊功能寄存器
|
|||
sfr ADC_CONTR = 0xbc; |
|||
#define ADC_POWER 0x80 |
|||
#define ADC_START 0x40 |
|||
#define ADC_FLAG 0x20 |
|||
sfr ADC_RES = 0xbd; |
|||
sfr ADC_RESL = 0xbe; |
|||
sfr ADCCFG = 0xde; |
|||
#define ADC_RESFMT 0x20 |
|||
|
|||
//SPI 特殊功能寄存器
|
|||
sfr SPSTAT = 0xcd; |
|||
#define SPIF 0x80 |
|||
#define WCOL 0x40 |
|||
sfr SPCTL = 0xce; |
|||
#define SSIG 0x80 |
|||
#define SPEN 0x40 |
|||
#define DORD 0x20 |
|||
#define MSTR 0x10 |
|||
#define CPOL 0x08 |
|||
#define CPHA 0x04 |
|||
sfr SPDAT = 0xcf; |
|||
|
|||
//IAP/ISP 特殊功能寄存器
|
|||
sfr IAP_DATA = 0xc2; |
|||
sfr IAP_ADDRH = 0xc3; |
|||
sfr IAP_ADDRL = 0xc4; |
|||
sfr IAP_CMD = 0xc5; |
|||
#define IAP_IDL 0x00 |
|||
#define IAP_READ 0x01 |
|||
#define IAP_WRITE 0x02 |
|||
#define IAP_ERASE 0x03 |
|||
sfr IAP_TRIG = 0xc6; |
|||
sfr IAP_CONTR = 0xc7; |
|||
#define IAPEN 0x80 |
|||
#define SWBS 0x40 |
|||
#define SWRST 0x20 |
|||
#define CMD_FAIL 0x10 |
|||
sfr ISP_DATA = 0xc2; |
|||
sfr ISP_ADDRH = 0xc3; |
|||
sfr ISP_ADDRL = 0xc4; |
|||
sfr ISP_CMD = 0xc5; |
|||
sfr ISP_TRIG = 0xc6; |
|||
sfr ISP_CONTR = 0xc7; |
|||
|
|||
//比较器特殊功能寄存器
|
|||
sfr CMPCR1 = 0xe6; |
|||
#define CMPEN 0x80 |
|||
#define CMPIF 0x40 |
|||
#define PIE 0x20 |
|||
#define NIE 0x10 |
|||
#define PIS 0x08 |
|||
#define NIS 0x04 |
|||
#define CMPOE 0x02 |
|||
#define CMPRES 0x01 |
|||
sfr CMPCR2 = 0xe7; |
|||
#define INVCMPO 0x80 |
|||
#define DISFLT 0x40 |
|||
|
|||
//PCA/PWM 特殊功能寄存器
|
|||
sfr CCON = 0xd8; |
|||
sbit CF = CCON^7; |
|||
sbit CR = CCON^6; |
|||
sbit CCF3 = CCON^3; |
|||
sbit CCF2 = CCON^2; |
|||
sbit CCF1 = CCON^1; |
|||
sbit CCF0 = CCON^0; |
|||
sfr CMOD = 0xd9; |
|||
#define CIDL 0x80 |
|||
#define ECF 0x01 |
|||
sfr CL = 0xe9; |
|||
sfr CH = 0xf9; |
|||
sfr CCAPM0 = 0xda; |
|||
#define ECOM0 0x40 |
|||
#define CCAPP0 0x20 |
|||
#define CCAPN0 0x10 |
|||
#define MAT0 0x08 |
|||
#define TOG0 0x04 |
|||
#define PWM0 0x02 |
|||
#define ECCF0 0x01 |
|||
sfr CCAPM1 = 0xdb; |
|||
#define ECOM1 0x40 |
|||
#define CCAPP1 0x20 |
|||
#define CCAPN1 0x10 |
|||
#define MAT1 0x08 |
|||
#define TOG1 0x04 |
|||
#define PWM1 0x02 |
|||
#define ECCF1 0x01 |
|||
sfr CCAPM2 = 0xdc; |
|||
#define ECOM2 0x40 |
|||
#define CCAPP2 0x20 |
|||
#define CCAPN2 0x10 |
|||
#define MAT2 0x08 |
|||
#define TOG2 0x04 |
|||
#define PWM2 0x02 |
|||
#define ECCF2 0x01 |
|||
sfr CCAPM3 = 0xdd; |
|||
#define ECOM3 0x40 |
|||
#define CCAPP3 0x20 |
|||
#define CCAPN3 0x10 |
|||
#define MAT3 0x08 |
|||
#define TOG3 0x04 |
|||
#define PWM3 0x02 |
|||
#define ECCF3 0x01 |
|||
sfr CCAP0L = 0xea; |
|||
sfr CCAP1L = 0xeb; |
|||
sfr CCAP2L = 0xec; |
|||
sfr CCAP3L = 0xed; |
|||
sfr CCAP0H = 0xfa; |
|||
sfr CCAP1H = 0xfb; |
|||
sfr CCAP2H = 0xfc; |
|||
sfr CCAP3H = 0xfd; |
|||
sfr PCA_PWM0 = 0xf2; |
|||
sfr PCA_PWM1 = 0xf3; |
|||
sfr PCA_PWM2 = 0xf4; |
|||
sfr PCA_PWM3 = 0xf5; |
|||
|
|||
//增强型PWM波形发生器特殊功能寄存器
|
|||
sfr PWMCFG = 0xf1; |
|||
#define CBIF 0x80 |
|||
#define ETADC 0x40 |
|||
sfr PWMIF = 0xf6; |
|||
#define C7IF 0x80 |
|||
#define C6IF 0x40 |
|||
#define C5IF 0x20 |
|||
#define C4IF 0x10 |
|||
#define C3IF 0x08 |
|||
#define C2IF 0x04 |
|||
#define C1IF 0x02 |
|||
#define C0IF 0x01 |
|||
sfr PWMFDCR = 0xf7; |
|||
#define INVCMP 0x80 |
|||
#define INVIO 0x40 |
|||
#define ENFD 0x20 |
|||
#define FLTFLIO 0x10 |
|||
#define EFDI 0x08 |
|||
#define FDCMP 0x04 |
|||
#define FDIO 0x02 |
|||
#define FDIF 0x01 |
|||
sfr PWMCR = 0xfe; |
|||
#define ENPWM 0x80 |
|||
#define ECBI 0x40 |
|||
|
|||
//如下特殊功能寄存器位于扩展RAM区域
|
|||
//访问这些寄存器,需先将P_SW2的BIT7设置为1,才可正常读写
|
|||
#define PWMC (*(unsigned int volatile xdata *)0xfff0) |
|||
#define PWMCH (*(unsigned char volatile xdata *)0xfff0) |
|||
#define PWMCL (*(unsigned char volatile xdata *)0xfff1) |
|||
#define PWMCKS (*(unsigned char volatile xdata *)0xfff2) |
|||
#define TADCP (*(unsigned char volatile xdata *)0xfff3) |
|||
#define TADCPH (*(unsigned char volatile xdata *)0xfff3) |
|||
#define TADCPL (*(unsigned char volatile xdata *)0xfff4) |
|||
#define PWM0T1 (*(unsigned int volatile xdata *)0xff00) |
|||
#define PWM0T1H (*(unsigned char volatile xdata *)0xff00) |
|||
#define PWM0T1L (*(unsigned char volatile xdata *)0xff01) |
|||
#define PWM0T2 (*(unsigned int volatile xdata *)0xff02) |
|||
#define PWM0T2H (*(unsigned char volatile xdata *)0xff02) |
|||
#define PWM0T2L (*(unsigned char volatile xdata *)0xff03) |
|||
#define PWM0CR (*(unsigned char volatile xdata *)0xff04) |
|||
#define PWM0HLD (*(unsigned char volatile xdata *)0xff05) |
|||
#define PWM1T1 (*(unsigned int volatile xdata *)0xff10) |
|||
#define PWM1T1H (*(unsigned char volatile xdata *)0xff10) |
|||
#define PWM1T1L (*(unsigned char volatile xdata *)0xff11) |
|||
#define PWM1T2 (*(unsigned int volatile xdata *)0xff12) |
|||
#define PWM1T2H (*(unsigned char volatile xdata *)0xff12) |
|||
#define PWM1T2L (*(unsigned char volatile xdata *)0xff13) |
|||
#define PWM1CR (*(unsigned char volatile xdata *)0xff14) |
|||
#define PWM1HLD (*(unsigned char volatile xdata *)0xff15) |
|||
#define PWM2T1 (*(unsigned int volatile xdata *)0xff20) |
|||
#define PWM2T1H (*(unsigned char volatile xdata *)0xff20) |
|||
#define PWM2T1L (*(unsigned char volatile xdata *)0xff21) |
|||
#define PWM2T2 (*(unsigned int volatile xdata *)0xff22) |
|||
#define PWM2T2H (*(unsigned char volatile xdata *)0xff22) |
|||
#define PWM2T2L (*(unsigned char volatile xdata *)0xff23) |
|||
#define PWM2CR (*(unsigned char volatile xdata *)0xff24) |
|||
#define PWM2HLD (*(unsigned char volatile xdata *)0xff25) |
|||
#define PWM3T1 (*(unsigned int volatile xdata *)0xff30) |
|||
#define PWM3T1H (*(unsigned char volatile xdata *)0xff30) |
|||
#define PWM3T1L (*(unsigned char volatile xdata *)0xff31) |
|||
#define PWM3T2 (*(unsigned int volatile xdata *)0xff32) |
|||
#define PWM3T2H (*(unsigned char volatile xdata *)0xff32) |
|||
#define PWM3T2L (*(unsigned char volatile xdata *)0xff33) |
|||
#define PWM3CR (*(unsigned char volatile xdata *)0xff34) |
|||
#define PWM3HLD (*(unsigned char volatile xdata *)0xff35) |
|||
#define PWM4T1 (*(unsigned int volatile xdata *)0xff40) |
|||
#define PWM4T1H (*(unsigned char volatile xdata *)0xff40) |
|||
#define PWM4T1L (*(unsigned char volatile xdata *)0xff41) |
|||
#define PWM4T2 (*(unsigned int volatile xdata *)0xff42) |
|||
#define PWM4T2H (*(unsigned char volatile xdata *)0xff42) |
|||
#define PWM4T2L (*(unsigned char volatile xdata *)0xff43) |
|||
#define PWM4CR (*(unsigned char volatile xdata *)0xff44) |
|||
#define PWM4HLD (*(unsigned char volatile xdata *)0xff45) |
|||
#define PWM5T1 (*(unsigned int volatile xdata *)0xff50) |
|||
#define PWM5T1H (*(unsigned char volatile xdata *)0xff50) |
|||
#define PWM5T1L (*(unsigned char volatile xdata *)0xff51) |
|||
#define PWM5T2 (*(unsigned int volatile xdata *)0xff52) |
|||
#define PWM5T2H (*(unsigned char volatile xdata *)0xff52) |
|||
#define PWM5T2L (*(unsigned char volatile xdata *)0xff53) |
|||
#define PWM5CR (*(unsigned char volatile xdata *)0xff54) |
|||
#define PWM5HLD (*(unsigned char volatile xdata *)0xff55) |
|||
#define PWM6T1 (*(unsigned int volatile xdata *)0xff60) |
|||
#define PWM6T1H (*(unsigned char volatile xdata *)0xff60) |
|||
#define PWM6T1L (*(unsigned char volatile xdata *)0xff61) |
|||
#define PWM6T2 (*(unsigned int volatile xdata *)0xff62) |
|||
#define PWM6T2H (*(unsigned char volatile xdata *)0xff62) |
|||
#define PWM6T2L (*(unsigned char volatile xdata *)0xff63) |
|||
#define PWM6CR (*(unsigned char volatile xdata *)0xff64) |
|||
#define PWM6HLD (*(unsigned char volatile xdata *)0xff65) |
|||
#define PWM7T1 (*(unsigned int volatile xdata *)0xff70) |
|||
#define PWM7T1H (*(unsigned char volatile xdata *)0xff70) |
|||
#define PWM7T1L (*(unsigned char volatile xdata *)0xff71) |
|||
#define PWM7T2 (*(unsigned int volatile xdata *)0xff72) |
|||
#define PWM7T2H (*(unsigned char volatile xdata *)0xff72) |
|||
#define PWM7T2L (*(unsigned char volatile xdata *)0xff73) |
|||
#define PWM7CR (*(unsigned char volatile xdata *)0xff74) |
|||
#define PWM7HLD (*(unsigned char volatile xdata *)0xff75) |
|||
|
|||
//I2C特殊功能寄存器
|
|||
//如下特殊功能寄存器位于扩展RAM区域
|
|||
//访问这些寄存器,需先将P_SW2的BIT7设置为1,才可正常读写
|
|||
#define I2CCFG (*(unsigned char volatile xdata *)0xfe80) |
|||
#define ENI2C 0x80 |
|||
#define MSSL 0x40 |
|||
#define I2CMSCR (*(unsigned char volatile xdata *)0xfe81) |
|||
#define EMSI 0x80 |
|||
#define I2CMSST (*(unsigned char volatile xdata *)0xfe82) |
|||
#define MSBUSY 0x80 |
|||
#define MSIF 0x40 |
|||
#define MSACKI 0x02 |
|||
#define MSACKO 0x01 |
|||
#define I2CSLCR (*(unsigned char volatile xdata *)0xfe83) |
|||
#define ESTAI 0x40 |
|||
#define ERXI 0x20 |
|||
#define ETXI 0x10 |
|||
#define ESTOI 0x08 |
|||
#define SLRST 0x01 |
|||
#define I2CSLST (*(unsigned char volatile xdata *)0xfe84) |
|||
#define SLBUSY 0x80 |
|||
#define STAIF 0x40 |
|||
#define RXIF 0x20 |
|||
#define TXIF 0x10 |
|||
#define STOIF 0x08 |
|||
#define TXING 0x04 |
|||
#define SLACKI 0x02 |
|||
#define SLACKO 0x01 |
|||
#define I2CSLADR (*(unsigned char volatile xdata *)0xfe85) |
|||
#define I2CTXD (*(unsigned char volatile xdata *)0xfe86) |
|||
#define I2CRXD (*(unsigned char volatile xdata *)0xfe87) |
|||
|
|||
/////////////////////////////////////////////////
|
|||
|
|||
#endif |
|||
|
|||
|
@ -0,0 +1,60 @@ |
|||
#include "time.h" |
|||
#include "../msp/uartx.h" |
|||
|
|||
#define D_TIMER_COUNT(t,clk,timeInUs) (U16)(65536 - 1.0 * (clk) / 1000 * (1.0 * timeInUs / 1000) / t) |
|||
//#define D_TIMER_COUNT(t,clk,timeInUs) (U16)(65536 - (clk) / 1000 * timeInUs / 1000 / t)
|
|||
|
|||
/*************初始化定时器0由 stc-isp v6.86L定时器计算器生成******************/ |
|||
void L0_timer0_Init(void) |
|||
{ |
|||
U16 val = D_TIMER_COUNT(12,D_sys_MainFre,D_sys_Jiffies * 1000); |
|||
AUXR &= 0x7F; //定时器时钟12T模式
|
|||
TMOD &= 0xF0; //设置定时器模式
|
|||
//TL0 = 0x00; //设置定时初值
|
|||
//TH0 = 0x4C; //设置定时初值
|
|||
TL0 = val; //设置定时初值
|
|||
TH0 = val >> 8; //设置定时初值
|
|||
TF0 = 0; //清除TF0标志
|
|||
TR0 = 1; //定时器0开始计时
|
|||
ET0 = 1; //add by cc
|
|||
} |
|||
|
|||
/******************************END*********************************/ |
|||
|
|||
|
|||
//10---87 10s
|
|||
/********************** Timer0中断函数************************/ |
|||
/// 和 L0_timer0_Init 关联,需要配置 bsp_config.h中的 D_sys_MainFre
|
|||
/// 默认10ms 作为TTSS系统的定时引擎
|
|||
void timer0_isrHandle (void) D_SERVE_TIMER0 |
|||
{ |
|||
U8 i = 0; |
|||
NOP(); NOP(); NOP(); |
|||
TF0 = 0; |
|||
#if 0 |
|||
/// 65535*65535 /3600/24/365=139nian/s=1.39nian/10ms
|
|||
///相当于1.39年后t_10ms 溢出,对于电池供电的系统而言 完全可以满足
|
|||
// 4,294,836,225 = 65535*65535 ;3600*24*60*60 = 31,536,000秒/年
|
|||
s_nos_tick.t_10ms ++;//D_led_D1_REV(); 20160522 验证
|
|||
#else |
|||
//系统时钟
|
|||
L1_tick_tick(); ///系统中的1sflag 和以10ms为颗粒的延时使用 为tdelay服务
|
|||
|
|||
//串口回调
|
|||
for(i=0; i< SERIAL_MAX_NUM; i++) |
|||
{ |
|||
if(ts_uart[i].tp_handler != NULL) |
|||
{ |
|||
ts_uart[i].tp_handler(ts_uart[i].uartx); |
|||
} |
|||
} |
|||
|
|||
#endif |
|||
/// BITN_1(DR_who_wakeup, DRB_who_wakeup_timer0);
|
|||
NOP(); NOP(); NOP(); |
|||
} |
|||
|
|||
|
|||
|
|||
|
|||
|
@ -0,0 +1,240 @@ |
|||
|
|||
#include "uartx.h" |
|||
|
|||
TS_uart_reg ts_uart[SERIAL_MAX_NUM] = {0}; |
|||
TS_send_buf ts_send_buf; |
|||
TS_recv_buf ts_recv_buf; |
|||
|
|||
void L0_uartN_set(U8 uartx, U8 x) /*reentrant*/ |
|||
{ |
|||
switch (uartx) |
|||
{ |
|||
case 0: |
|||
SBUF = (x); |
|||
break; |
|||
case 1: |
|||
S2BUF = (x); |
|||
break; |
|||
case 2: |
|||
S3BUF = (x); |
|||
break; |
|||
case 3: |
|||
S4BUF = (x); |
|||
break; |
|||
default: |
|||
break; |
|||
} |
|||
} |
|||
|
|||
U8 L0_uartN_get(U8 uartx) |
|||
{ |
|||
U8 x = 0; |
|||
switch (uartx) |
|||
{ |
|||
case 0: |
|||
x = SBUF; |
|||
break; |
|||
case 1: |
|||
x = S2BUF; |
|||
break; |
|||
case 2: |
|||
x = S3BUF; |
|||
break; |
|||
case 3: |
|||
x = S4BUF; |
|||
break; |
|||
default: |
|||
break; |
|||
} |
|||
return x; |
|||
} |
|||
|
|||
void L0_uartN_485(U8 uartx) |
|||
{ |
|||
switch(uartx) |
|||
{ |
|||
case 0: D_UART0_485_TX(); break; |
|||
case 1: D_UART2_485_TX(); break; |
|||
case 2: D_UART3_485_TX(); break; |
|||
case 3: D_UART4_485_TX(); break; |
|||
default: break; |
|||
} |
|||
} |
|||
|
|||
void L0_waitFree_uartN(U8 uartx) |
|||
{ |
|||
ts_uart[uartx].s.over = 0; |
|||
while (ts_uart[uartx].s.ok != D_ready) |
|||
{ |
|||
#if 1 //发送数据特别快时,某些情况下会导致数据发送出错
|
|||
ts_uart[uartx].s.over++; |
|||
if (ts_uart[uartx].s.over > 20000) |
|||
{ |
|||
ts_uart[uartx].s.max = 0; |
|||
ts_uart[uartx].s.now = 0; |
|||
ts_uart[uartx].s.ok = D_ready; |
|||
break; |
|||
} |
|||
#endif |
|||
} |
|||
} |
|||
|
|||
void L0_uartN_sendArray(U8 uartx, void *buf, U16 len) |
|||
{ |
|||
U16 i; |
|||
if (len == 0) |
|||
{ |
|||
return; |
|||
} |
|||
L0_waitFree_uartN(uartx); |
|||
|
|||
L0_uartN_485(uartx); |
|||
ts_uart[uartx].s.ok = D_clear; |
|||
ts_uart[uartx].s.over = 0; |
|||
ts_uart[uartx].s.max = len; |
|||
ts_uart[uartx].s.now = 1; |
|||
if (len <= ts_uart[uartx].s.bufmax) |
|||
{ |
|||
//将参数buf拷贝至内部buf
|
|||
for (i = 0; i < len; i++) |
|||
{ |
|||
ts_uart[uartx].s.buf[i] = ((U8 *)buf)[i]; |
|||
} |
|||
ts_uart[uartx].s.p = ts_uart[uartx].s.buf; |
|||
} |
|||
else |
|||
{ |
|||
//不使用内部buf,如果再发送完毕之前,参数buf被回收,发送会出错
|
|||
ts_uart[uartx].s.p = (U8 *)buf; |
|||
} |
|||
L0_uartN_set(uartx, ts_uart[uartx].s.p[0]); |
|||
} |
|||
|
|||
void L0_uartN_uc(U8 uartx, U8 ww) |
|||
{ |
|||
L0_uartN_sendArray(uartx, &ww, 1); |
|||
} |
|||
|
|||
void L0_uartN_us(U8 uartx, vU16 ww) |
|||
{ |
|||
U_U16 uStemp; |
|||
uStemp.word = ww; |
|||
ts_uart[uartx].s.buf3[0] = uStemp.BYTE2.h; |
|||
ts_uart[uartx].s.buf3[1] = uStemp.BYTE2.l; |
|||
L0_uartN_sendArray(uartx, ts_uart[uartx].s.buf3, 2); |
|||
} |
|||
|
|||
void L0_uartN_ul(U8 uartx, vU32 ww) |
|||
{ |
|||
U_U32 uStemp; |
|||
L0_waitFree_uartN(uartx); |
|||
uStemp.dWord = ww; |
|||
ts_uart[uartx].s.buf3[0] = uStemp.BYTE4.byte0; |
|||
ts_uart[uartx].s.buf3[1] = uStemp.BYTE4.byte1; |
|||
ts_uart[uartx].s.buf3[2] = uStemp.BYTE4.byte2; |
|||
ts_uart[uartx].s.buf3[3] = uStemp.BYTE4.byte3; |
|||
L0_uartN_sendArray(uartx, ts_uart[uartx].s.buf3, 4); |
|||
} |
|||
|
|||
void L0_uartN_0d0a(U8 uartx) |
|||
{ |
|||
L0_waitFree_uartN(uartx); |
|||
ts_uart[uartx].s.buf3[0] = 0x0d; |
|||
ts_uart[uartx].s.buf3[1] = 0x0a; |
|||
L0_uartN_sendArray(uartx, ts_uart[uartx].s.buf3, 2); |
|||
} |
|||
|
|||
void L0_uartN_uchex(U8 uartx, U8 ww) |
|||
{ |
|||
L0_waitFree_uartN(uartx); |
|||
ts_uart[uartx].s.buf3[0] = cguHex2Char[D_uc_high(ww)][1]; |
|||
ts_uart[uartx].s.buf3[1] = cguHex2Char[D_uc_low(ww)][1]; |
|||
L0_uartN_sendArray(uartx, ts_uart[uartx].s.buf3, 2); |
|||
} |
|||
|
|||
void L0_uartN_ushex(U8 uartx, vU16 ww) |
|||
{ |
|||
U_F16 k; |
|||
L0_waitFree_uartN(uartx); |
|||
k.us = ww; |
|||
ts_uart[uartx].s.buf3[0] = cguHex2Char[D_uc_high(k.BYTE2.H)][1]; |
|||
ts_uart[uartx].s.buf3[1] = cguHex2Char[D_uc_low(k.BYTE2.H)][1]; |
|||
ts_uart[uartx].s.buf3[2] = cguHex2Char[D_uc_high(k.BYTE2.L)][1]; |
|||
ts_uart[uartx].s.buf3[3] = cguHex2Char[D_uc_low(k.BYTE2.L)][1]; |
|||
L0_uartN_sendArray(uartx, ts_uart[uartx].s.buf3, 4); |
|||
} |
|||
|
|||
void L0_uartN_ulhex(U8 uartx, U32 ww) |
|||
{ |
|||
U_U32 k; |
|||
L0_waitFree_uartN(uartx); |
|||
k.dWord = ww; |
|||
ts_uart[uartx].s.buf3[0] = cguHex2Char[D_uc_high(k.BYTE4.byte0)][1]; |
|||
ts_uart[uartx].s.buf3[1] = cguHex2Char[D_uc_low(k.BYTE4.byte0)][1]; |
|||
ts_uart[uartx].s.buf3[2] = cguHex2Char[D_uc_high(k.BYTE4.byte1)][1]; |
|||
ts_uart[uartx].s.buf3[3] = cguHex2Char[D_uc_low(k.BYTE4.byte1)][1]; |
|||
ts_uart[uartx].s.buf3[4] = cguHex2Char[D_uc_high(k.BYTE4.byte2)][1]; |
|||
ts_uart[uartx].s.buf3[5] = cguHex2Char[D_uc_low(k.BYTE4.byte2)][1]; |
|||
ts_uart[uartx].s.buf3[6] = cguHex2Char[D_uc_high(k.BYTE4.byte3)][1]; |
|||
ts_uart[uartx].s.buf3[7] = cguHex2Char[D_uc_low(k.BYTE4.byte3)][1]; |
|||
L0_uartN_sendArray(uartx, ts_uart[uartx].s.buf3, 8); |
|||
} |
|||
|
|||
void L0_uartN_sendstr(U8 uartx, U8 *str) |
|||
{ |
|||
L0_uartN_sendArray(uartx, str, Lc_strlen(str)); |
|||
} |
|||
|
|||
void L0_uartN_sendArrayHex(U8 uartx, vU8 *buf, U16 n) |
|||
{ |
|||
U16 i; |
|||
for (i = 0; i < n; i++) |
|||
{ |
|||
L0_uartN_uchex(uartx, buf[i]); |
|||
L0_uartN_uc(uartx, ' '); |
|||
} |
|||
} |
|||
|
|||
void L0_uartN_s2b(U8 uartx) |
|||
{ |
|||
if(ts_uart[uartx].r.head == 0) |
|||
{ |
|||
ts_uart[uartx].r.head = 1; |
|||
ts_uart[uartx].r.ok = 0; |
|||
ts_uart[uartx].r.num = 0; |
|||
} |
|||
else |
|||
{ |
|||
if(ts_uart[uartx].r.num >= ts_uart[uartx].r.bufmax) |
|||
{ |
|||
ts_uart[uartx].r.num = 0; |
|||
} |
|||
} |
|||
ts_uart[uartx].r.buf[ ts_uart[uartx].r.num ] = ts_uart[uartx].r.reg; |
|||
ts_uart[uartx].r.num++; |
|||
ts_uart[uartx].r.idle = 0; |
|||
ts_uart[uartx].r.overtime_t = 0; |
|||
} |
|||
|
|||
void L0_uartN_overtime_callback(U8 uartx) |
|||
{ |
|||
if(0 == ts_uart[uartx].r.idle) |
|||
{ |
|||
if(ts_uart[uartx].r.overtime_t >= 2) |
|||
{ |
|||
//设置总线空闲
|
|||
ts_uart[uartx].r.idle = 1; |
|||
ts_uart[uartx].r.head = 0; |
|||
ts_uart[uartx].r.overtime_t = 0; |
|||
|
|||
//数据不为空
|
|||
if(ts_uart[uartx].r.num > 0) |
|||
{ |
|||
/// 接收到的数据结束: 总线空闲+buf非空
|
|||
// ts_uart[uartx].r.num = 0;
|
|||
ts_uart[uartx].r.ok = 1; |
|||
} |
|||
} |
|||
ts_uart[uartx].r.overtime_t ++; |
|||
} |
|||
} |
@ -0,0 +1,97 @@ |
|||
|
|||
#ifndef _uartN_H |
|||
#define _uartN_H |
|||
#include "../clib/clib.h" |
|||
#include "../tpc/tpc_x.h" |
|||
#include "../bsp/bsp_config.h" |
|||
|
|||
#define SERIAL_MAX_NUM 4 |
|||
#define D_UART_send_buf2_max 8 //此处改动会影响L0_uartN_ulhex函数
|
|||
|
|||
#define D_uartN_free() (0 == ts_uart_send_buf[uartx].max) |
|||
#define D_uartN_busy() (0 != ts_uart_send_buf[uartx].max) |
|||
#define D_BRT_COUNT(t,clk,uartBRT) (U16)(65536- (clk / (4 * uartBRT * t))) |
|||
|
|||
/////可以依据实际使用独立定制
|
|||
#define D_send1_max 64 |
|||
#define D_send2_max 64 |
|||
#define D_send3_max 64 |
|||
#define D_send4_max 64 |
|||
|
|||
/////可以依据实际使用独立定制
|
|||
#define D_recv1_max 64 |
|||
#define D_recv2_max 64 |
|||
#define D_recv3_max 64 |
|||
#define D_recv4_max 64 |
|||
|
|||
typedef struct |
|||
{ |
|||
U8 r1[D_recv1_max]; |
|||
U8 r2[D_recv2_max]; |
|||
U8 r3[D_recv3_max]; |
|||
U8 r4[D_recv4_max]; |
|||
}TS_recv_buf; |
|||
|
|||
typedef struct |
|||
{ |
|||
U8 s1[D_send1_max]; |
|||
U8 s2[D_send2_max]; |
|||
U8 s3[D_send3_max]; |
|||
U8 s4[D_send4_max]; |
|||
}TS_send_buf; |
|||
|
|||
typedef struct _TS_uart_reg |
|||
{ |
|||
struct |
|||
{ |
|||
vU8 num; //接收到的数目注意数据长度的范围
|
|||
vU8 *p; |
|||
vU16 now; /// 当前buf所在的位置 0------(max-1)
|
|||
vU16 max; /// 当前buf中数据长度,也就是需要发送的长度
|
|||
vU32 over; /// 结束等待标志,over累加到某个值时,结束等待
|
|||
vU8 ok; /// 发送完成标志
|
|||
vU8 *buf; |
|||
vU8 buf3[D_UART_send_buf2_max]; |
|||
U16 bufmax; ///buf的最大长度
|
|||
}s; |
|||
|
|||
struct |
|||
{ |
|||
vU8 reg; |
|||
vU8 ok; //接收协议ok标志,串口初始化设置为0
|
|||
vU8 idle; //空闲标志
|
|||
vU8 overtime_t; //超时溢出的计数器
|
|||
vU8 head; //接收标志头标志,串口初始化设置0
|
|||
vU8 num; //协议实际长度
|
|||
vU8 *buf; ////协议缓冲,由每个串口根据需要的缓冲区大小自己定义
|
|||
U16 bufmax; ///buf的最大长度
|
|||
}r; |
|||
|
|||
void (*tp_handler)(U8 uartx); |
|||
U8 uartx; |
|||
|
|||
}TS_uart_reg; |
|||
|
|||
extern TS_uart_reg ts_uart[SERIAL_MAX_NUM]; |
|||
extern TS_send_buf ts_send_buf; |
|||
extern TS_recv_buf ts_recv_buf; |
|||
|
|||
extern void L0_uartN_init(U8 uartx); |
|||
extern void L0_uartN_set(U8 uartx,U8 x); |
|||
extern U8 L0_uartN_get(U8 uartx); |
|||
extern void L0_uartN_sendArray(U8 uartx,void *buf,U16 len); |
|||
extern void L0_uartN_uc(U8 uartx,U8 ww); |
|||
extern void L0_uartN_us(U8 uartx,vU16 ww); |
|||
extern void L0_uartN_ul(U8 uartx,vU32 ww); |
|||
extern void L0_uartN_0d0a(U8 uartx); |
|||
extern void L0_uartN_uchex(U8 uartx, U8 ww); |
|||
extern void L0_uartN_ushex(U8 uartx, U16 ww); |
|||
extern void L0_uartN_ulhex(U8 uartx, U32 ww); |
|||
extern void L0_uartN_sendstr(U8 uartx,U8 *buf); |
|||
extern void L0_uartN_sendArrayHex(U8 uartx,vU8 *buf,U16 n); |
|||
extern void L0_uartN_s2b(U8 uartx); |
|||
extern void L0_uartN_overtime_callback(U8 uartx); |
|||
|
|||
|
|||
#endif //#ifndef _uartN_H
|
|||
|
@ -1,109 +0,0 @@ |
|||
#include "time.h" |
|||
#define D_TIMER_COUNT(t,clk,timeInUs) (U16)(65536 - 1.0 * (clk) / 1000 * (1.0 * timeInUs / 1000) / t) |
|||
//#define D_TIMER_COUNT(t,clk,timeInUs) (U16)(65536 - (clk) / 1000 * timeInUs / 1000 / t)
|
|||
|
|||
/*************初始化定时器0由 stc-isp v6.86L定时器计算器生成******************/ |
|||
void L0_timer0_Init(void) |
|||
{ |
|||
U16 val = D_TIMER_COUNT(12,D_sys_MainFre,D_sys_Jiffies * 1000); |
|||
AUXR &= 0x7F; //定时器时钟12T模式
|
|||
TMOD &= 0xF0; //设置定时器模式
|
|||
//TL0 = 0x00; //设置定时初值
|
|||
//TH0 = 0x4C; //设置定时初值
|
|||
TL0 = val; //设置定时初值
|
|||
TH0 = val >> 8; //设置定时初值
|
|||
TF0 = 0; //清除TF0标志
|
|||
TR0 = 1; //定时器0开始计时
|
|||
ET0 = 1; //add by cc
|
|||
} |
|||
|
|||
|
|||
//10---87 10s
|
|||
/********************** Timer0中断函数************************/ |
|||
/// 和 L0_timer0_Init 关联,需要配置 bsp_config.h中的 D_sys_MainFre
|
|||
/// 默认10ms 作为TTSS系统的定时引擎
|
|||
void timer0_isrHandle (void) D_SERVE_TIMER0 |
|||
{//
|
|||
NOP(); NOP(); NOP(); |
|||
TF0 = 0; |
|||
#if 0 |
|||
/// 65535*65535 /3600/24/365=139nian/s=1.39nian/10ms
|
|||
///相当于1.39年后t_10ms 溢出,对于电池供电的系统而言 完全可以满足
|
|||
// 4,294,836,225 = 65535*65535 ;3600*24*60*60 = 31,536,000秒/年
|
|||
s_nos_tick.t_10ms ++;//D_led_D1_REV(); 20160522 验证
|
|||
|
|||
#else |
|||
|
|||
L1_tick_tick(); ///系统中的1sflag 和以10ms为颗粒的延时使用 为tdelay服务
|
|||
|
|||
#endif |
|||
/// BITN_1(DR_who_wakeup, DRB_who_wakeup_timer0);
|
|||
NOP(); NOP(); NOP(); |
|||
} |
|||
|
|||
|
|||
|
|||
// void L0_timer1_Init() //600微秒@11.0592MHz
|
|||
// {
|
|||
// #if 0
|
|||
// AUXR |= 0x40; //定时器时钟1T模式
|
|||
// TMOD &= 0x0F; //设置定时器模式
|
|||
// TL1 = 0x14; //设置定时初值
|
|||
// TH1 = 0xE6; //设置定时初值
|
|||
// TF1 = 0; //清除TF1标志
|
|||
// TR1 = 1; //定时器1开始计时
|
|||
// ET1 = 1; //add by cc
|
|||
|
|||
// #else
|
|||
// U16 val = D_TIMER_COUNT(1,D_sys_MainFre,600);
|
|||
// AUXR |= 0x40; //定时器时钟1T模式
|
|||
// TMOD &= 0x0F; //设置定时器模式
|
|||
// //TL1 = 0xCD; //设置定时初始值
|
|||
// //TH1 = 0xD4; //设置定时初始值
|
|||
// TL1 = val; //设置定时初值
|
|||
// TH1 = val >>8; //设置定时初值
|
|||
// TF1 = 0; //清除TF1标志
|
|||
// TR1 = 1; //定时器1开始计时
|
|||
// ET1 = 1; //add by cc
|
|||
// #endif
|
|||
// }
|
|||
|
|||
|
|||
// void L0_timer1_restart() //600微秒@11.0592MHz
|
|||
// {
|
|||
// U16 val = D_TIMER_COUNT(1,D_sys_MainFre,600);
|
|||
// TR1 = 0; //先关闭,否则会重复中断,起不到resetart效果
|
|||
// #if 1
|
|||
// AUXR |= 0x40; //定时器时钟1T模式
|
|||
// TMOD &= 0x0F; //设置定时器模式
|
|||
// //TL1 = 0x14; //设置定时初值
|
|||
// //TH1 = 0xE6; //设置定时初值
|
|||
// TL1 = val; //设置定时初值
|
|||
// TH1 = val >>8; //设置定时初值
|
|||
// TF1 = 0; //清除TF1标志
|
|||
// TR1 = 1; //定时器1开始计时
|
|||
// ET1 = 1; //add by cc
|
|||
|
|||
// #else
|
|||
// AUXR |= 0x40; //定时器时钟1T模式
|
|||
// TMOD &= 0x0F; //设置定时器模式
|
|||
// TL1 = 0xCD; //设置定时初始值
|
|||
// TH1 = 0xD4; //设置定时初始值
|
|||
// TF1 = 0; //清除TF1标志
|
|||
// TR1 = 1; //定时器1开始计时
|
|||
// ET1 = 1; //add by cc
|
|||
// #endif
|
|||
// }
|
|||
|
|||
// void L0_timer1_stop(void)
|
|||
// {
|
|||
// TR1 = 0;
|
|||
// TF1 = 0;
|
|||
// }
|
|||
|
|||
|
|||
/******************************END*********************************/ |
|||
|
|||
|
|||
|
|||
|
@ -1,213 +0,0 @@ |
|||
//////////////////////////////////////////////////////////////////////////
|
|||
/// COPYRIGHT NOTICE
|
|||
/// Copyright (c) 2015, 传控科技
|
|||
/// All rights reserved.
|
|||
///
|
|||
/// @file main.c
|
|||
/// @brief main app
|
|||
///
|
|||
///(本文件实现的功能的详述)
|
|||
///
|
|||
/// @version 1.1 CCsens technology
|
|||
/// @author CC
|
|||
/// @date 20150102
|
|||
///
|
|||
///
|
|||
/// 修订说明:最初版本
|
|||
/// Modified by:
|
|||
/// Modified date:
|
|||
/// Version:
|
|||
/// Descriptions:
|
|||
// 20160413 CC-ACC-VH02
|
|||
// 连接至 J22 RXD0 TXD0
|
|||
//P5_DIR &= ~BITN1; //p5.1输出TXD
|
|||
//P5_DIR |= BITN0; //p5.0输入RXD
|
|||
//P5_SEL0 &= ~(BITN0 +BITN1); //设置P5.0 P5.1为UART0 RXD TXD
|
|||
//P5_SEL1 |= BITN0 +BITN1;
|
|||
|
|||
/*****************************************************************************
|
|||
update by cc @201700110 |
|||
针对多串口 和 单一串口 有区别 每个串口是独立的还是分开的有讲究 程序是复杂的还是软件应用简单是 |
|||
个需要平衡的事情. |
|||
|
|||
clib/clib.c: |
|||
公用的函数 和硬件无关 |
|||
放置串行模式(串口等其他通讯总线类的输出)输出的函数, |
|||
一些覆盖模式输出的(lcd等固屏输出的)的也可使用 |
|||
void Lc_print(void (*L0pf_send_uc)(char ww), char *dat,...) |
|||
----------------------------------------------------------------------------------------- |
|||
uartcom/Uprotocol2app |
|||
协议到应用 |
|||
为了适应不同的通讯协议需要不同的uart口来对应 和应用相关 |
|||
|
|||
typedef struct _ts_lcm_pro_; 应用协议包的定义? LCM的协议------------ |
|||
L3_UARTcom0_exp_protocol 解析应用协议 |
|||
----------------------------------------------------------------------------------------- |
|||
uartcom/urec2protocol: 接收到的数据放入到指向特定协议的缓存中,和协议的格式有关 一般分为 标头式或者标尾式 |
|||
公用的串口通讯定义 |
|||
struct _s_uart_rec_ 的公共协议包(关键的结构体)的声明------struct _s_uart_rec_ |
|||
void L1_uart_2buf(struct _s_uart_rec_ *p)串行数据保存到指向特定协议的缓冲中 |
|||
-------------------------------------------------------------------------------------------- |
|||
msp/uartx.c 底层代码 和cpu相关 缓存发送也放在里面 |
|||
L0_UART0_Init |
|||
UART0_IRQHandler |
|||
L0_Usend_uc------UserDef |
|||
----------------------------------------------------------------------------------------- |
|||
********************************************************************************/ |
|||
#include "uart_x.h" |
|||
|
|||
TS_uart_reg ts_uart[SERIAL_MAX_NUM] = {0}; |
|||
|
|||
void L0_uartN_set(U8 uartx,U8 x) /*reentrant*/ |
|||
{ |
|||
switch(uartx) |
|||
{ |
|||
case 0:SBUF = (x);break; |
|||
case 1:S2BUF = (x);break; |
|||
case 2:S3BUF = (x);break; |
|||
case 3:S4BUF = (x);break; |
|||
default:break; |
|||
} |
|||
} |
|||
|
|||
U8 L0_uartN_get(U8 uartx) |
|||
{ |
|||
U8 x = 0; |
|||
switch(uartx) |
|||
{ |
|||
case 0:x = SBUF; break; |
|||
case 1:x = S2BUF;break; |
|||
case 2:x = S3BUF;break; |
|||
case 3:x = S4BUF;break; |
|||
default:break; |
|||
} |
|||
return x; |
|||
} |
|||
|
|||
void L0_waitFree_uartN(U8 uartx) |
|||
{ |
|||
ts_uart[uartx].p->over = 0; |
|||
while(ts_uart[uartx].p->ok != D_ready) |
|||
{ |
|||
#if 1 //发送数据特别快时,某些情况下会导致数据发送出错
|
|||
if(ts_uart[uartx].p->over ++ > 600000) |
|||
{ |
|||
break; |
|||
} |
|||
#endif |
|||
} |
|||
} |
|||
|
|||
void L0_uartN_sendArray(U8 uartx,void *buf,U16 len) |
|||
{ |
|||
L0_waitFree_uartN(uartx); |
|||
if(len == 0){ |
|||
return; |
|||
} |
|||
ts_uart[uartx].p->ok = D_clear; |
|||
ts_uart[uartx].p->over = 0; |
|||
ts_uart[uartx].p->max = len; |
|||
ts_uart[uartx].p->now = 1; |
|||
if(len <= D_UART_send_buf_max) |
|||
{ |
|||
//将参数buf拷贝至内部buf
|
|||
for(ts_uart[uartx].p->num = 0;ts_uart[uartx].p->num < len;ts_uart[uartx].p->num ++) |
|||
{ |
|||
ts_uart[uartx].p->buf[ts_uart[uartx].p->num] = ((U8*)buf)[ts_uart[uartx].p->num]; |
|||
} |
|||
ts_uart[uartx].p->p = ts_uart[uartx].p->buf; |
|||
} |
|||
else |
|||
{ |
|||
//不使用内部buf,如果再发送完毕之前,参数buf被回收,发送会出错
|
|||
ts_uart[uartx].p->p = (U8 *)buf; |
|||
} |
|||
L0_uartN_set(uartx,ts_uart[uartx].p->p[0]); |
|||
} |
|||
|
|||
void L0_uartN_uc(U8 uartx,U8 ww) |
|||
{ |
|||
L0_uartN_sendArray(uartx,&ww,1); |
|||
} |
|||
|
|||
void L0_uartN_us(U8 uartx,vU16 ww) |
|||
{ |
|||
U_U16 uStemp; |
|||
uStemp.word = ww; |
|||
ts_uart[uartx].p->buf3[0] = uStemp.BYTE2.h; |
|||
ts_uart[uartx].p->buf3[1] = uStemp.BYTE2.l; |
|||
L0_uartN_sendArray(uartx,ts_uart[uartx].p->buf3,2); |
|||
} |
|||
|
|||
void L0_uartN_ul(U8 uartx,vU32 ww) |
|||
{ |
|||
U_U32 uStemp; |
|||
L0_waitFree_uartN(uartx); |
|||
uStemp.dWord = ww; |
|||
ts_uart[uartx].p->buf3[0] = uStemp.BYTE4.byte0; |
|||
ts_uart[uartx].p->buf3[1] = uStemp.BYTE4.byte1; |
|||
ts_uart[uartx].p->buf3[2] = uStemp.BYTE4.byte2; |
|||
ts_uart[uartx].p->buf3[3] = uStemp.BYTE4.byte3; |
|||
L0_uartN_sendArray(uartx,ts_uart[uartx].p->buf3,4); |
|||
} |
|||
|
|||
void L0_uartN_0d0a(U8 uartx) |
|||
{ |
|||
L0_waitFree_uartN(uartx); |
|||
ts_uart[uartx].p->buf3[0] = 0x0d; |
|||
ts_uart[uartx].p->buf3[1] = 0x0a; |
|||
L0_uartN_sendArray(uartx,ts_uart[uartx].p->buf3,2); |
|||
} |
|||
|
|||
void L0_uartN_uchex(U8 uartx,U8 ww) |
|||
{ |
|||
L0_waitFree_uartN(uartx); |
|||
ts_uart[uartx].p->buf3[0] = cguHex2Char[D_uc_high(ww)][1]; |
|||
ts_uart[uartx].p->buf3[1] = cguHex2Char[D_uc_low (ww)][1]; |
|||
L0_uartN_sendArray(uartx,ts_uart[uartx].p->buf3,2); |
|||
} |
|||
|
|||
void L0_uartN_ushex(U8 uartx,vU16 ww) |
|||
{ |
|||
U_F16 k; |
|||
L0_waitFree_uartN(uartx); |
|||
k.us = ww; |
|||
ts_uart[uartx].p->buf3[0] = cguHex2Char[D_uc_high(k.BYTE2.H)][1]; |
|||
ts_uart[uartx].p->buf3[1] = cguHex2Char[D_uc_low (k.BYTE2.H)][1]; |
|||
ts_uart[uartx].p->buf3[2] = cguHex2Char[D_uc_high(k.BYTE2.L)][1]; |
|||
ts_uart[uartx].p->buf3[3] = cguHex2Char[D_uc_low (k.BYTE2.L)][1]; |
|||
L0_uartN_sendArray(uartx,ts_uart[uartx].p->buf3,4); |
|||
} |
|||
|
|||
void L0_uartN_ulhex(U8 uartx,U32 ww) |
|||
{ |
|||
U_U32 k; |
|||
L0_waitFree_uartN(uartx); |
|||
k.dWord = ww; |
|||
ts_uart[uartx].p->buf3[0] = cguHex2Char[D_uc_high(k.BYTE4.byte0)][1]; |
|||
ts_uart[uartx].p->buf3[1] = cguHex2Char[D_uc_low (k.BYTE4.byte0)][1]; |
|||
ts_uart[uartx].p->buf3[2] = cguHex2Char[D_uc_high(k.BYTE4.byte1)][1]; |
|||
ts_uart[uartx].p->buf3[3] = cguHex2Char[D_uc_low (k.BYTE4.byte1)][1]; |
|||
ts_uart[uartx].p->buf3[4] = cguHex2Char[D_uc_high(k.BYTE4.byte2)][1]; |
|||
ts_uart[uartx].p->buf3[5] = cguHex2Char[D_uc_low (k.BYTE4.byte2)][1]; |
|||
ts_uart[uartx].p->buf3[6] = cguHex2Char[D_uc_high(k.BYTE4.byte3)][1]; |
|||
ts_uart[uartx].p->buf3[7] = cguHex2Char[D_uc_low (k.BYTE4.byte3)][1]; |
|||
L0_uartN_sendArray(uartx,ts_uart[uartx].p->buf3,8); |
|||
} |
|||
|
|||
void L0_uartN_sendstr(U8 uartx,U8 *str) |
|||
{ |
|||
L0_uartN_sendArray(uartx,str,Lc_strlen(str)); |
|||
} |
|||
|
|||
void L0_uartN_sendArrayHex(U8 uartx,vU8 *buf,U16 n) |
|||
{ |
|||
U16 i; |
|||
for(i=0;i<n;i++) |
|||
{ |
|||
L0_uartN_uchex(uartx,buf[i]); |
|||
L0_uartN_uc(uartx,' '); |
|||
} |
|||
} |
|||
|
|||
|
@ -1,120 +0,0 @@ |
|||
//////////////////////////////////////////////////////////////////////////
|
|||
/// COPYRIGHT NOTICE
|
|||
/// Copyright (c) 2015, 传控科技
|
|||
/// All rights reserved.
|
|||
///
|
|||
/// @file main.c
|
|||
/// @brief main app
|
|||
///
|
|||
///(本文件实现的功能的详述)
|
|||
///
|
|||
/// @version 1.1 CCsens technology
|
|||
/// @author CC
|
|||
/// @date 20150102
|
|||
///
|
|||
///
|
|||
/// 修订说明:最初版本
|
|||
/// Modified by:
|
|||
/// Modified date:
|
|||
/// Version:
|
|||
/// Descriptions:
|
|||
//////////////////////////////////////////////////////////////////////////
|
|||
/*****************************************************************************
|
|||
update by cc @201700110 |
|||
针对多串口 和 单一串口 有区别 每个串口是独立的还是分开的有讲究 程序是复杂的还是软件应用简单是 |
|||
个需要平衡的事情. |
|||
|
|||
clib/clib.c: |
|||
公用的函数 和硬件无关 |
|||
放置串行模式(串口等其他通讯总线类的输出)输出的函数, |
|||
一些覆盖模式输出的(lcd等固屏输出的)的也可使用 |
|||
void Lc_print(void (*L0pf_send_uc)(char ww), char *dat,...) |
|||
----------------------------------------------------------------------------------------- |
|||
uartcom/Uprotocol2app |
|||
协议到应用 |
|||
为了适应不同的通讯协议需要不同的uart口来对应 和应用相关 |
|||
|
|||
typedef struct _ts_lcm_pro_; 应用协议包的定义? LCM的协议------------ |
|||
L3_UARTcom0_exp_protocol 解析应用协议 |
|||
----------------------------------------------------------------------------------------- |
|||
uartcom/urec2protocol: 接收到的数据放入到指向特定协议的缓存中,和协议的格式有关 一般分为 标头式或者标尾式 |
|||
公用的串口通讯定义 |
|||
struct _s_uart_rec_ 的公共协议包(关键的结构体)的声明------struct _s_uart_rec_ |
|||
void L1_uart_2buf(struct _s_uart_rec_ *p)串行数据保存到指向特定协议的缓冲中 |
|||
-------------------------------------------------------------------------------------------- |
|||
msp/uartx.c 底层代码 和cpu相关 缓存发送也放在里面 |
|||
L0_UART0_Init |
|||
UART0_IRQHandler |
|||
L0_Usend_uc------UserDef |
|||
----------------------------------------------------------------------------------------- |
|||
********************************************************************************/ |
|||
|
|||
|
|||
#ifndef _uartN_H |
|||
#define _uartN_H |
|||
#include "../clib/clib.h" |
|||
#include "../tpc/tpc_x.h" |
|||
#include "../bsp/bsp_config.h" |
|||
|
|||
#define D_uartN_free() (0 == ts_uart_send_buf[uartx].max) |
|||
#define D_uartN_busy() (0 != ts_uart_send_buf[uartx].max) |
|||
#define D_BRT_COUNT(t,clk,uartBRT) (U16)(65536- (clk / (4 * uartBRT * t))) |
|||
|
|||
|
|||
typedef struct _ts_uart_send_buf_ |
|||
{ |
|||
vU8 num; //接收到的数目注意数据长度的范围
|
|||
vU8 *p; |
|||
vU16 now; /// 当前buf所在的位置 0------(max-1)
|
|||
vU16 max; /// 当前buf的最大值,也就是需要发送的长度
|
|||
vU32 over; /// 结束等待标志,over累加到某个值时,结束等待
|
|||
vU8 ok; /// 发送完成标志
|
|||
vU8 buf[D_UART_send_buf_max + 1]; |
|||
vU8 buf3[D_UART_send_buf2_max]; |
|||
}Ts_uart_send_buf; |
|||
|
|||
typedef struct _ts_uart_recv_buf_ |
|||
{//8byte
|
|||
vU8 reg; |
|||
vU8 ok; //接收协议ok标志,串口初始化设置为0
|
|||
vU8 head; //接收标志头标志,串口初始化设置0
|
|||
vU8 maxnum; //接收到的数目的最大值,串口初始化设置
|
|||
vU8 cashe[2]; |
|||
vU8 head_0; |
|||
vU8 head_1; |
|||
vU8 tail_0; |
|||
vU8 index; //当前下标
|
|||
vU8 num; //协议实际长度
|
|||
vU8 *buf; ////协议缓冲,由每个串口根据需要的缓冲区大小自己定义
|
|||
vU8 *sp; |
|||
vU8 *sp2; //备份值,如果协议需要备份,单独提供备份缓冲区
|
|||
vU8 ocr; |
|||
vU8 crc[2]; |
|||
}Ts_uart_recv_buf; |
|||
|
|||
typedef struct _TS_uart_reg |
|||
{ |
|||
Ts_uart_send_buf *p; |
|||
Ts_uart_recv_buf *t; |
|||
void (*tp_handler)(Ts_uart_recv_buf *); |
|||
}TS_uart_reg; |
|||
|
|||
extern TS_uart_reg ts_uart[SERIAL_MAX_NUM]; |
|||
|
|||
extern void L0_uartN_init(U8 uartx); |
|||
extern void L0_uartN_set(U8 uartx,U8 x); |
|||
extern U8 L0_uartN_get(U8 uartx); |
|||
extern void L0_uartN_sendArray(U8 uartx,void *buf,U16 len); |
|||
extern void L0_uartN_uc(U8 uartx,U8 ww); |
|||
extern void L0_uartN_us(U8 uartx,vU16 ww); |
|||
extern void L0_uartN_ul(U8 uartx,vU32 ww); |
|||
extern void L0_uartN_0d0a(U8 uartx); |
|||
extern void L0_uartN_uchex(U8 uartx, U8 ww); |
|||
extern void L0_uartN_ushex(U8 uartx, U16 ww); |
|||
extern void L0_uartN_ulhex(U8 uartx, U32 ww); |
|||
extern void L0_uartN_sendstr(U8 uartx,U8 *buf); |
|||
extern void L0_uartN_sendArrayHex(U8 uartx,vU8 *buf,U16 n); |
|||
|
|||
|
|||
#endif //#ifndef _uartN_H
|
|||
|
@ -1,64 +0,0 @@ |
|||
|
|||
/*****************************************************************************
|
|||
update by cc @201501101001 |
|||
针对多串口 和 单一串口 有区别 每个串口是独立的还是分开的有讲究 程序是复杂的还是软件应用简单是 |
|||
个需要平衡的事情.d |
|||
|
|||
uartcom/uartlib.c: |
|||
公用的函数 和硬件无关 |
|||
放置串行模式(串口等其他通讯总线类的输出)输出的函数, |
|||
一些覆盖模式输出的(lcd等固屏输出的)的也可使用 |
|||
void Lc_print(void (*L0pf_send_uc)(char ww), char *dat,...) |
|||
----------------------------------------------------------------------------------------- |
|||
uartcom/uartcom0 |
|||
和uart相关的通讯协议 com + n |
|||
为了适应不同的通讯协议需要不同的uart口来对应 和应用相关 |
|||
|
|||
typedef struct _ts_lcm_pro_; 应用协议包的定义? LCM的协议------------ |
|||
L3_UARTcom0_exp_protocol 解析应用协议 |
|||
----------------------------------------------------------------------------------------- |
|||
uartcom/uprotocol: 主要是为 uartcom + n服务的 驱动层到应用层缓存的过度 |
|||
公用的串口通讯定义 |
|||
struct _s_protocol_ 的公共协议包(关键的结构体)的声明------struct _s_protocol_ |
|||
void L1_uart_2buf(struct _s_protocol_ *p)串行数据保存到缓冲中 |
|||
-------------------------------------------------------------------------------------------- |
|||
msp/uartx.c 底层代码 和cpu相关 |
|||
L0_UART0_Init |
|||
UART0_IRQHandler |
|||
L0_Usend_uc----------s_at0 |
|||
----------------------------------------------------------------------------------------- |
|||
********************************************************************************/ |
|||
|
|||
#include "modbus.h" |
|||
#include "../bsp/bsp_config.h" |
|||
#include "../ctask/tick.h" |
|||
#include "../clib/clib.h" |
|||
|
|||
//MODBUS协议解析函数
|
|||
//超出D_tp_handle_x_len,不继续保存数据
|
|||
void L1_s2b_PH4(Ts_uart_recv_buf *p) |
|||
{ |
|||
p->ok = 1; |
|||
return; |
|||
//p->modbusstmp = D_sys_now;
|
|||
if(p->head == 0) |
|||
{ |
|||
p->head = 1; |
|||
p->maxnum = D_TPC_HANDLER_X_LEN; |
|||
p->sp = p->buf; |
|||
p->num = 0; |
|||
p->sp[p->num++] = p->reg; |
|||
} |
|||
else |
|||
{ |
|||
if(p->num < p->maxnum) |
|||
{ |
|||
p->sp[p->num++] = p->reg; |
|||
} |
|||
} |
|||
} |
|||
|
|||
/******************************************************************************
|
|||
** End Of File |
|||
******************************************************************************/ |
|||
|
@ -1,114 +0,0 @@ |
|||
//////////////////////////////////////////////////////////////////////////
|
|||
/// COPYRIGHT NOTICE
|
|||
/// Copyright (c) 2018, 传控科技
|
|||
/// All rights reserved.
|
|||
///
|
|||
/// @file tpc_fsk.c
|
|||
/// @brief transaction protocol control of fsk
|
|||
///
|
|||
///(本文件实现的功能的详述)
|
|||
///
|
|||
/// @version 1.1 CCsens technology
|
|||
/// @author CC
|
|||
/// @date 20150102
|
|||
///
|
|||
///
|
|||
/// @version 1.2 CCsens technology
|
|||
/// @author CC
|
|||
/// @date 20180308
|
|||
/// @info 整理
|
|||
|
|||
//
|
|||
//////////////////////////////////////////////////////////////////////////
|
|||
|
|||
|
|||
#ifndef __TPC_MODBUS_H_ |
|||
#define __TPC_MODBUS_H_ |
|||
|
|||
#include "tpc_x.h" |
|||
//<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
|
|||
|
|||
/**
|
|||
* 用户协议 |
|||
*/ |
|||
enum MODBUS_OPER |
|||
{ |
|||
MODBUS_OPER_READ = 0x03, |
|||
MODBUS_OPER_READCONFIG = 0x04, |
|||
MODBUS_OPER_WRITE = 0x06, |
|||
MODBUS_OPER_WRITE_M = 0x10, |
|||
MODBUS_OPER_ERR = 0x8F, |
|||
}; |
|||
|
|||
//协议类型: MODBUS RTU模式
|
|||
//#define D_s_PH4_modbus_max (128)
|
|||
//#define D_s_PH4_modbus_max (64)
|
|||
#define D_s_modbus_min 4 //modbus协议的最小长度
|
|||
|
|||
typedef struct ts_ph4_modbus |
|||
{ |
|||
U8 slaver; //从机地址
|
|||
U8 oper; //功能码
|
|||
U8 buf[D_TPC_HANDLER_X_LEN + 8]; |
|||
U8 crc[2]; |
|||
}TS_PH4_modbus; |
|||
|
|||
typedef struct s_modbus_03_ack |
|||
{ |
|||
U8 bytes; |
|||
U8 buf[D_TPC_HANDLER_X_LEN-1]; |
|||
}Modbus03Ack; |
|||
|
|||
typedef struct s_modbus_06_ack |
|||
{ |
|||
U16 reg; |
|||
U16 val; |
|||
}Modbus06Ack; |
|||
|
|||
typedef struct s_modbus_10_ack |
|||
{ |
|||
U16 reg; |
|||
U16 num; |
|||
}Modbus10Ack; |
|||
|
|||
typedef struct |
|||
{ |
|||
U16 slaver; |
|||
U16 oper; |
|||
U16 reg; |
|||
U16 regnum; |
|||
U16 bytes; |
|||
U8 *buf; |
|||
U16 mask; |
|||
}MD_SLAVER_INFO; |
|||
|
|||
#if 0 |
|||
typedef struct |
|||
{ |
|||
U8 reg; |
|||
U8 slaver; //对于主设备,slaver代表当前轮询的包的id,主设备每次轮询时,总是应该将slaver设置为轮询到的从设备id;对于从设备,slaver总是等于slaverId
|
|||
U8 max; //接收到的数目的最大值
|
|||
vU8 head; //接收标志头标志
|
|||
vU8 ok; //接收协议ok标志
|
|||
vU8 num; |
|||
vU8 *sp; |
|||
U8 buf[D_s_PH4_modbus_max + 8]; |
|||
vU8 crc[2]; |
|||
vU32 modbusstmp; |
|||
}TS_Handle_PH4; |
|||
#endif |
|||
extern U8 L3_pack_modbus(TS_PH4_modbus *pmodbus, MD_SLAVER_INFO *slaver_info); |
|||
//extern U8 L3_pack_modbusack(TS_PH4_modbus *pmodbus ,U8 slaver, U8 oper, U8 bufsize);
|
|||
extern U16 L3_modbus_slaver_ack(TS_PH4_modbus *pmodbus,TS_PH4_modbus *pModbusAck); |
|||
extern void L3_modbus_master_handler(TS_PH4_modbus *pmodbus,MD_SLAVER_INFO *p_slaver_info); |
|||
extern void L1_s2b_PH4(Ts_uart_recv_buf *p); |
|||
extern void L1_modbus_split(Ts_uart_recv_buf *p); |
|||
|
|||
|
|||
#endif /* end __TPC_UART_H_ */ |
|||
/*****************************************************************************
|
|||
** End Of File |
|||
******************************************************************************/ |
|||
|
|||
|
|||
|
Loading…
Reference in new issue