//////////////////////////////////////////////////////////////////////////// ///@copyright Copyright (c) 2017, ´«¿Ø¿Æ¼¼ All rights reserved. ///------------------------------------------------------------------------- /// @file hard_config.h /// @brief hard config include /// @info FILE FOR HARDWARE SETUP AND SOFTWARE SETUP///FOR EXAMPLE: BAORD ,MCU,IDE /// @info YOU CAN CHANGE OR ADD THE DEFINE IF YOU NEED /// @info Õû¸öǶÈëʽÏîÄ¿µÄÈë¿Ú Ê×ÏÈÊÇÈ·Èϵç·°å È»ºóÈ·ÈÏcpu оƬÐͺŠȻºóÈ·ÈϱàÒëÆ÷ Ö®ºóÊÇÈí¼þ¿ò¼Ü ×îºóÊÇÓ¦ÓóÌÐò /// @info bsp_CONFIG ΪÆäËûÍ·ÎļþµÄʼ×æ TYPE_BOARD_xx ///------------------------------------------------------------------------- /// @version 1.1 /// @author CC /// @date 20180308 /// @note ////////////////////////////////////////////////////////////////////////////// /// @version 5.1 /// @author CC /// @date 20200301 /// @note ////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////// #ifndef _BSP_CONFIG_H #define _BSP_CONFIG_H #include #include "bsp_config0.h" #define D_version_v 'L' #if 0 #define D_leda_OFF(); D_P35_OFF(); #define D_leda_ON(); D_P35_ON(); #define D_leda_REV(); D_P35_REV(); #define D_ledb_OFF(); D_P34_OFF(); #define D_ledb_ON(); D_P34_ON(); #define D_ledb_REV(); D_P34_REV(); #else #define D_leda_OFF(); ///D_P35_OFF(); #define D_leda_ON(); ///D_P35_ON(); #define D_leda_REV(); ///D_P35_REV(); #define D_ledb_OFF(); ///D_P34_OFF(); #define D_ledb_ON(); ///D_P34_ON(); #define D_ledb_REV(); ///D_P34_REV(); #endif #if 0 #define D_debug_sim #endif //#define D_iic_inspect #define D_open_save_f #define TYPE_UASER_BOARD ccSensor_WS_ps5ws //CC_SE_paper_main_m10_smt01.sch //STEP 2 TYPE_UASER_BOARD CONFIG >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> #if(TYPE_UASER_BOARD == ccSensor_WS_ps5ws)///-------TYPE_UASER_BOARD----------------TYPE_UASER_BOARD---------- //2.0-5.5 8K 2kram 4k eeprom spi iic 2uart tssop20 stc8f2k08s2 1.2yuan //2.0-5.5 16K 2kram 4k eeprom spi iic 2uart tssop20 stc8f2k16s2 1.4yuan //1.7-5.5 8K 1kram 3k eeprom spi iic 2uart tssop20 stc8f2k16s2 1.1yuan #define D_version_h 0x37 #define D_version_L 0x38 #define TYPE_MCU TYPE_MCU_STC #define TYPE_IDE TYPE_IDE_KEIL #include #include #include #include "../cpu/STC_stc8a8k.h" #if 0//// ÉÕдÅäÖà . ÄÚ²¿IRCÕñµ´Æ÷µÄƵÂÊ: 22.128MHz . µôµç»½ÐѶ¨Ê±Æ÷µÄƵÂÊ: 35.575KHz . Õñµ´Æ÷·Å´óÔöÒæʹÄÜ . P3.2ºÍP3.3ÓëÏ´ÎÏÂÔØÎÞ¹Ø . Éϵ縴λʱÔö¼Ó¶îÍâµÄ¸´Î»ÑÓʱ . ¸´Î»Òý½ÅÓÃ×÷ÆÕͨI/O¿Ú . ¼ì²âµ½µÍѹʱ²»¸´Î»,¶ø²úÉúµÍѹÖÐ¶Ï . µÍѹ¼ì²âÃż÷µçѹ : 2.20 V . Éϵ縴λʱ,Ó²¼þ²»Æô¶¯ÄÚ²¿¿´ÃŹ· . Éϵç×Ô¶¯Æô¶¯ÄÚ²¿¿´ÃŹ·Ê±µÄÔ¤·ÖƵÊýΪ : 256 . ¿ÕÏÐ״̬ʱ¿´ÃŹ·¶¨Ê±Æ÷Í£Ö¹¼ÆÊý . Æô¶¯¿´ÃŹ·ºó,Èí¼þ¿ÉÒÔÐ޸ķÖƵÊý,µ«²»Äܹرտ´ÃŹ· . Ï´ÎÏÂÔØÓû§³ÌÐòʱ,½«Óû§EEPROMÇøÒ»²¢²Á³ý . Ï´ÎÏÂÔØÓû§³ÌÐòʱ,ûÓÐÏà¹ØµÄ¶Ë¿Ú¿ØÖÆ485 . Ï´ÎÏÂÔØʱ²»ÐèҪУÑéÏÂÔØ¿ÚÁî . TXD½ÅֱͨÊä³öRXD½ÅµÄµçƽ . оƬ¸´Î»ºó,TXD½ÅΪǿÍÆÍìÊä³ö . оƬ¸´Î»ºó,P2.0Êä³ö¸ßµçƽ . ÄÚ²¿²Î¿¼µçѹ: 1341 mV (²Î¿¼·¶Î§: 1270~1410mV) . ÄÚ²¿°²ÅŲâÊÔʱ¼ä: 2018Äê1ÔÂ13ÈÕ . оƬ³ö³§ÐòÁкŠ: F64181C6219784 µ¥Æ¬»úÐͺÅ: STC8F2K08S2 ¹Ì¼þ°æ±¾ºÅ: 7.3.10U . Óû§É趨ƵÂÊ: 22.118MHz . µ÷½ÚºóµÄƵÂÊ: 22.128MHz . ƵÂʵ÷½ÚÎó²î: 0.043% ²Ù×÷³É¹¦ !(2019-02-24 18:16:24) ¸Ãµ¥Æ¬»úµÄ¹¦ÄÜ: 2.0-5v 8kflash 2kram DPTR EEPROM 4K SPI IIC T0-T4 5¸ö¶¨Ê±Æ÷ µôµç»½ÐÑרÓö¨Ê±Æ÷ ±È½ÏÆ÷ ÄÚ²¿µçѹ¼ì²âÖÐ¶Ï ¿´ÃŹ· tssop20 1.2ÔªÈËÃñ±Ò #endif #include "../cpu/c51_macro.h" #define D_MCLKO_DIV2 2 #define D_MCLKO_DIV4 4 #define D_MCLKO_DIV8 6 #define D_MCLKO_DIV16 8 #define D_MCLKO_DIV32 10 #define D_MCLKO_DIV64 12 #define D_CPUfamily_type D_CPUfamily_8bits #define D_uart0_BRT BRT_115200 #define D_uart0_SBIT SBIT_1 #ifdef D_debug115200 #if 0 #define L2_task_L0_uart0_uc(X) L0_uart0_uc(X)/// #define GC032a_L0_uart0_uc(x) L0_uart0_uc(x)// #else #define L2_task_L0_uart0_uc(X) L0_uart0_uc(X)// #define GC032a_L0_uart0_uc(x) L0_uart0_uc(x)// #endif #else #define L2_task_L0_uart0_uc(x) //L0_uart0_uc_debug(x)/////// #define L2_task_L0_uart0_uchex(x) // L0_uart0_uchex(x)///// #define GC032a_L0_uart0_uc(x) //L0_uart0_uc_debug(x)///// #define GC032a_L0_uart0_uchex(x) //L0_uart0_uchex(x)//// #define GC032a_L0_uart0_sendArray(x,Y) //L0_uart0_uchex(Y)// #define GC032a_L0_uart0_us(x) //L0_uart0_us(x)*/ #endif ///#define D_sys_MainFre MainFre_16M2 #define D_sys_MainFre MainFre_11M ///#define D_sys_MainFre MainFre_22M #if(MainFre_5M == D_sys_MainFre) #define D_Cdelay_200us 20 #define D_Cdelay_1us 1 ////while p21·­×ªÊ±²â¶¨ 500k 2us Ò»¸öÖ¸Áî #elif(MainFre_22M == D_sys_MainFre) #define D_Cdelay_200us 10 #define D_Cdelay_1us 10 ////while p21·­×ªÊ±²â¶¨ 500k 2us Ò»¸öÖ¸Áî #define D_Cdelay_1ms 36// 500 14ms 360--10ms #define D_Cdelay_5ms 180// 500 14ms 360--10ms #define D_Cdelay_15ms 900 #define D_Cdelay_30ms 2400 #define L0_delay_1us() Lc_delay_nop(2) // 5¸önop() 100ns 50¸önop() 1us (20)=10us (2)1.5us #define L0_delay_10us() Lc_delay_nop(20) // 5¸önop() 100ns 50¸önop() 1us (20)=10us (2)1.5us // 0x01/#define D_MCLKO_set D_MCLKO_DIV16 //1.389MHz/800ns@MCU.22MHz- #define D_MCLKO_set D_MCLKO_DIV8 ////2.778MHz/400ns@MCU.22MHz- ///#define D_MCLKO_set D_MCLKO_DIV4 ////5.556MHz/ @MCU.22MHz- ///#define D_MCLKO_set D_MCLKO_DIV2 ////5.556MHz/ @MCU.22MHz- #define D_0xfa 0x33 //#define D_0xfa 0x11 /******************* #define D_0xf7 0x01 #define D_0xf8 0x02 #define D_P00x46 0x26////pclk /////cccc201805 hs low polarity #define D_P00x4c 0x00 #define D_P00x4d 0x04 #define D_P00x43 0x10 ///EABLE CrCb fixed en 02 #define D_P00x4a 0x83 ///div_gate+clk_en 82 #define D_P00xda 0xff /// Cr fixed #define D_P00xdb 0xff /// Cb fixed #define D_0xfa 0x22 //00000000000000 P0:0x4d Debug_mode3 8 0x04 RW [7:4] test_image_fix_value [3] fix_value_mode [2] remove_ff_mode [1] subsample extend opclk disable when SPI [0] clk2x_bypass *******************/ #elif(MainFre_27M == D_sys_MainFre) #define D_Cdelay_200us 20 #define D_Cdelay_1us 1 ////while p21·­×ªÊ±²â¶¨ 500k 2us Ò»¸öÖ¸Áî #else ///MainFre_11M #define D_Cdelay_200us 20 #define D_Cdelay_1us 1 #define D_Cdelay_1ms 36// #define D_Cdelay_5ms 180// #define D_Cdelay_15ms 900 #define D_Cdelay_30ms 2400 #if 0 #define L0_delay_1us() Lc_delay_nop(5) // 5¸önop() 100ns 50¸önop() 1us (20)=10us (2)1.5us #define L0_delay_10us() Lc_delay_nop(40) // 5¸önop() 100ns 50¸önop() 1us (20)=10us (2)1.5us #define L0_delay_40us() Lc_delay_nop(150) // 5¸önop() 100ns 50¸önop() 1us (20)=10us (2)1.5us #else #define L0_delay_1us() Lc_delay_nop(0) // 5¸önop() 100ns 50¸önop() 1us (20)=10us (2)1.5us #define L0_delay_10us() Lc_delay_nop(4) // 5¸önop() 100ns 50¸önop() 1us (20)=10us (2)1.5us //示波器测试结果 #define L0_delay_40us() Lc_delay_nop(18) // 5¸önop() 100ns 50¸önop() 1us (20)=10us (2)1.5us #endif #endif//D_sys_MainFre) /*******>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> 1£¬ ´®¿Ú1Ñ¡Ôñ¶¨Ê±Æ÷2Ϊ²¨ÌØÂÊ·¢ÉúÆ÷ AUXR &= 0xFB; //¶¨Ê±Æ÷2ʱÖÓΪFosc/12,¼´12T, 2£¬ timer0 ΪtaskʹÓà L1_tick_tick 3£¬ ///<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<****/ #define D_IO_LED1_OFF() D_P35_OFF() #define D_IO_LED2_OFF() D_P34_OFF() #define D_IO_485_RE_OFF() D_P33_OFF() #define D_IO_485_DE_OFF() D_P32_OFF() #define D_IO_LED1_INIT() ///D_P35_INIT() #define D_IO_LED2_INIT() ///D_P34_INIT() #define D_IO_485_RE_INIT() ///D_P33_INIT() #define D_IO_485_DE_INIT() ///D_P32_INIT() #define D_IO_LED1_ON() D_P35_ON() #define D_IO_LED2_ON() D_P34_ON() #define D_IO_485_RE_ON() D_P33_ON() #define D_IO_485_DE_ON() D_P32_ON() ////////////////////////////////sim iic config //¸ù¾ÝschµÄ¶¨Òå #define L0_IIC_SIM_INIT() BITN_0(P3M1,5);BITN_0(P3M0,5);\ BITN_0(P3M1,4);BITN_0(P3M0,4); ///stc¶ÀÓÐ10 ¸ß×è #define L0_IIC_SIM_close() BITN_1(P3M1,5);BITN_0(P3M0,5);\ BITN_1(P3M1,4);BITN_0(P3M0,4); #if 10 #define L0_SDA_ON() D_P34_ON() #define L0_SDA_OFF() D_P34_OFF() #define L0_SDA_AT() D_P34_AT() #define L0_SCL_ON() D_P35_ON() #define L0_SCL_OFF() D_P35_OFF() #else #define L0_SDA_ON() //D_P34_ON() #define L0_SDA_OFF() //D_P34_OFF() #define L0_SDA_AT() //D_P34_AT() #define L0_SCL_ON() //D_P35_ON() #define L0_SCL_OFF() //D_P35_OFF() #endif #if(BRT_4800 == D_uart0_BRT) #define D_txd4_wakeup() P31 = 1 // >750us #define D_txd4_low() P31 = 0 ////ΪÊÊÓ¦433 Ä£¿éµÄ¹¦ºÄÎÊÌâ ////debugµÄʱºòÇÐ¼Ç ´Ë´¦»á¶Ô´®¿ÚÔì³ÉÓ°Ïì lowÓÐЧµÄÇé¿öÏÂÆäËûµÄ·¢ËͲ»»áºÃʹ,³ý·ÇÊÂÏÈwakeup #else #define D_txd4_wakeup() //P31 = 1 // >750us #define D_txd4_low() //P31 = 0 #endif #define DR_who_wakeup22 i2ctxd ///// DR: Define Register DRB:bit of Define Register #define DR_isr_times SADDR #define DR_who_wakeup SADEN #define DRB_who_wakeup_timer0 BITN0 #define DRB_who_wakeup_action BITN1 #define DRB_who_wakeup_voice BITN2 #ifdef doc342343 BITN_1(DR_who_wakeup, DRB_who_wakeup_timer0); BITN_0(DR_who_wakeup, DRB_who_wakeup_timer0); if(BITN_G(DR_who_wakeup, DRB_who_wakeup_timer0)) { } #endif #elif(TYPE_UASER_BOARD == TYPE_BOARD_TI26_MT01_M178)///-------TYPE_UASER_BOARD----------------TYPE_UASER_BOARD---------- #define TYPE_MCU TYPE_MCU_STC #define TYPE_IDE TYPE_IDE_KEIL #include #include #include #include "../cpu/STC_stc8a8k.h" #define D_CPUfamily_type D_CPUfamily_8bits #elif(TYPE_UASER_BOARD == TYPE_BOARD_SMMM_MB_VH032_0E) #endif #endif//_BSP_CONFIG_H /*********************************end file*********************************************/