#ifndef __STC_stc8h3k_H_ #define __STC_stc8h3k_H_ // STC_stc8a8k.h #include #if 0 ///////////////////////////////////////////////// 正在检测目标单片机 ... 单片机型号: STC8H3K64S4 固件版本号: 7.4.1U 当前芯片的硬件选项为: . 系统ISP工作频率: 23.801MHz . 内部IRC振荡器的频率: 22.123MHz . 掉电唤醒定时器的频率: 35.400KHz . 振荡器放大增益使能 . P3.2和P3.3与下次下载无关 . 上电复位时增加额外的复位延时 . 复位引脚用作普通I/O口 . 检测到低压时复位 . 低压检测门槛电压 : 2.00 V . 上电复位时,硬件不启动内部看门狗 . 上电自动启动内部看门狗时的预分频数为 : 256 . 空闲状态时看门狗定时器停止计数 . 启动看门狗后,软件可以修改分频数,但不能关闭看门狗 . 下次下载用户程序时,将用户EEPROM区一并擦除 . 下次下载用户程序时,没有相关的端口控制485 . 下次下载时不需要校验下载口令 . 内部参考电压: 1185 mV (参考范围: 1100~1300mV) . 内部安排测试时间: 2021年8月16日 单片机型号: STC8H3K64S4 固件版本号: 7.4.1U 操作成功 !(2021-12-25 21:35:51) ///////////////////////////////////////////////// #endif ///////////////////////////////////////////////// ///////////////////////////////////////////////// //包含本头文件后,不用另外再包含"REG51.H" sfr P0 = 0x80; sbit P00 = P0^0; sbit P01 = P0^1; sbit P02 = P0^2; sbit P03 = P0^3; sbit P04 = P0^4; sbit P05 = P0^5; sbit P06 = P0^6; sbit P07 = P0^7; sfr SP = 0x81; sfr DPL = 0x82; sfr DPH = 0x83; sfr S4CON = 0x84; sfr S4BUF = 0x85; sfr PCON = 0x87; sfr TCON = 0x88; sbit TF1 = TCON^7; sbit TR1 = TCON^6; sbit TF0 = TCON^5; sbit TR0 = TCON^4; sbit IE1 = TCON^3; sbit IT1 = TCON^2; sbit IE0 = TCON^1; sbit IT0 = TCON^0; sfr TMOD = 0x89; sfr TL0 = 0x8a; sfr TL1 = 0x8b; sfr TH0 = 0x8c; sfr TH1 = 0x8d; sfr AUXR = 0x8e; sfr INTCLKO = 0x8f; sfr P1 = 0x90; sbit P10 = P1^0; sbit P11 = P1^1; sbit P12 = P1^2; sbit P13 = P1^3; sbit P14 = P1^4; sbit P15 = P1^5; sbit P16 = P1^6; sbit P17 = P1^7; sfr P1M1 = 0x91; sfr P1M0 = 0x92; sfr P0M1 = 0x93; sfr P0M0 = 0x94; sfr P2M1 = 0x95; sfr P2M0 = 0x96; sfr SCON = 0x98; sbit SM0 = SCON^7; sbit SM1 = SCON^6; sbit SM2 = SCON^5; sbit REN = SCON^4; sbit TB8 = SCON^3; sbit RB8 = SCON^2; sbit TI = SCON^1; sbit RI = SCON^0; sfr SBUF = 0x99; sfr S2CON = 0x9a; sfr S2BUF = 0x9b; sfr IRCBAND = 0x9d; sfr LIRTRIM = 0x9e; sfr IRTRIM = 0x9f; sfr P2 = 0xa0; sbit P20 = P2^0; sbit P21 = P2^1; sbit P22 = P2^2; sbit P23 = P2^3; sbit P24 = P2^4; sbit P25 = P2^5; sbit P26 = P2^6; sbit P27 = P2^7; sfr P_SW1 = 0xa2; sfr IE = 0xa8; sbit EA = IE^7; sbit ELVD = IE^6; sbit EADC = IE^5; sbit ES = IE^4; sbit ET1 = IE^3; sbit EX1 = IE^2; sbit ET0 = IE^1; sbit EX0 = IE^0; sfr SADDR = 0xa9; sfr WKTCL = 0xaa; sfr WKTCH = 0xab; sfr S3CON = 0xac; sfr S3BUF = 0xad; sfr TA = 0xae; sfr IE2 = 0xaf; sfr P3 = 0xb0; sbit P30 = P3^0; sbit P31 = P3^1; sbit P32 = P3^2; sbit P33 = P3^3; sbit P34 = P3^4; sbit P35 = P3^5; sbit P36 = P3^6; sbit P37 = P3^7; sfr P3M1 = 0xb1; sfr P3M0 = 0xb2; sfr P4M1 = 0xb3; sfr P4M0 = 0xb4; sfr IP2 = 0xb5; sfr IP2H = 0xb6; sfr IPH = 0xb7; sfr IP = 0xb8; sbit PPCA = IP^7; sbit PLVD = IP^6; sbit PADC = IP^5; sbit PS = IP^4; sbit PT1 = IP^3; sbit PX1 = IP^2; sbit PT0 = IP^1; sbit PX0 = IP^0; sfr SADEN = 0xb9; sfr P_SW2 = 0xba; sfr ADC_CONTR = 0xbc; sfr ADC_RES = 0xbd; sfr ADC_RESL = 0xbe; sfr P4 = 0xc0; sbit P40 = P4^0; sbit P41 = P4^1; sbit P42 = P4^2; sbit P43 = P4^3; sbit P44 = P4^4; sbit P45 = P4^5; sbit P46 = P4^6; sbit P47 = P4^7; sfr WDT_CONTR = 0xc1; sfr IAP_DATA = 0xc2; sfr IAP_ADDRH = 0xc3; sfr IAP_ADDRL = 0xc4; sfr IAP_CMD = 0xc5; sfr IAP_TRIG = 0xc6; sfr IAP_CONTR = 0xc7; sfr P5 = 0xc8; sbit P50 = P5^0; sbit P51 = P5^1; sbit P52 = P5^2; sbit P53 = P5^3; sbit P54 = P5^4; sbit P55 = P5^5; sbit P56 = P5^6; sbit P57 = P5^7; sfr P5M1 = 0xc9; sfr P5M0 = 0xca; sfr P6M1 = 0xcb; sfr P6M0 = 0xcc; sfr SPSTAT = 0xcd; sfr SPCTL = 0xce; sfr SPDAT = 0xcf; sfr PSW = 0xd0; sbit CY = PSW^7; sbit AC = PSW^6; sbit F0 = PSW^5; sbit RS1 = PSW^4; sbit RS0 = PSW^3; sbit OV = PSW^2; sbit F1 = PSW^1; sbit P = PSW^0; sfr T4T3M = 0xd1; sfr T4H = 0xd2; sfr T4L = 0xd3; sfr T3H = 0xd4; sfr T3L = 0xd5; sfr T2H = 0xd6; sfr T2L = 0xd7; sfr USBCLK = 0xdc; sfr ADCCFG = 0xde; sfr IP3 = 0xdf; sfr ACC = 0xe0; sfr P7M1 = 0xe1; sfr P7M0 = 0xe2; sfr DPS = 0xe3; sfr DPL1 = 0xe4; sfr DPH1 = 0xe5; sfr CMPCR1 = 0xe6; sfr CMPCR2 = 0xe7; sfr P6 = 0xe8; sfr USBDAT = 0xec; sfr IP3H = 0xee; sfr AUXINTIF = 0xef; sfr B = 0xf0; sfr USBCON = 0xf4; sfr IAP_TPS = 0xf5; sfr P7 = 0xf8; sfr USBADR = 0xfc; sfr RSTCFG = 0xff; //如下特殊功能寄存器位于扩展RAM区域 //访问这些寄存器,需先将P_SW2的BIT7设置为1,才可正常读写 ///////////////////////////////////////////////// //FF00H-FFFFH ///////////////////////////////////////////////// ///////////////////////////////////////////////// //FE00H-FEFFH ///////////////////////////////////////////////// #define CKSEL (*(unsigned char volatile xdata *)0xfe00) #define CLKDIV (*(unsigned char volatile xdata *)0xfe01) #define HIRCCR (*(unsigned char volatile xdata *)0xfe02) #define XOSCCR (*(unsigned char volatile xdata *)0xfe03) #define IRC32KCR (*(unsigned char volatile xdata *)0xfe04) #define MCLKOCR (*(unsigned char volatile xdata *)0xfe05) #define IRCDB (*(unsigned char volatile xdata *)0xfe06) #define X32KCR (*(unsigned char volatile xdata *)0xfe08) #define P0PU (*(unsigned char volatile xdata *)0xfe10) #define P1PU (*(unsigned char volatile xdata *)0xfe11) #define P2PU (*(unsigned char volatile xdata *)0xfe12) #define P3PU (*(unsigned char volatile xdata *)0xfe13) #define P4PU (*(unsigned char volatile xdata *)0xfe14) #define P5PU (*(unsigned char volatile xdata *)0xfe15) #define P6PU (*(unsigned char volatile xdata *)0xfe16) #define P7PU (*(unsigned char volatile xdata *)0xfe17) #define P0NCS (*(unsigned char volatile xdata *)0xfe18) #define P1NCS (*(unsigned char volatile xdata *)0xfe19) #define P2NCS (*(unsigned char volatile xdata *)0xfe1a) #define P3NCS (*(unsigned char volatile xdata *)0xfe1b) #define P4NCS (*(unsigned char volatile xdata *)0xfe1c) #define P5NCS (*(unsigned char volatile xdata *)0xfe1d) #define P6NCS (*(unsigned char volatile xdata *)0xfe1e) #define P7NCS (*(unsigned char volatile xdata *)0xfe1f) #define P0SR (*(unsigned char volatile xdata *)0xfe20) #define P1SR (*(unsigned char volatile xdata *)0xfe21) #define P2SR (*(unsigned char volatile xdata *)0xfe22) #define P3SR (*(unsigned char volatile xdata *)0xfe23) #define P4SR (*(unsigned char volatile xdata *)0xfe24) #define P5SR (*(unsigned char volatile xdata *)0xfe25) #define P6SR (*(unsigned char volatile xdata *)0xfe26) #define P7SR (*(unsigned char volatile xdata *)0xfe27) #define P0DR (*(unsigned char volatile xdata *)0xfe28) #define P1DR (*(unsigned char volatile xdata *)0xfe29) #define P2DR (*(unsigned char volatile xdata *)0xfe2a) #define P3DR (*(unsigned char volatile xdata *)0xfe2b) #define P4DR (*(unsigned char volatile xdata *)0xfe2c) #define P5DR (*(unsigned char volatile xdata *)0xfe2d) #define P6DR (*(unsigned char volatile xdata *)0xfe2e) #define P7DR (*(unsigned char volatile xdata *)0xfe2f) #define P0IE (*(unsigned char volatile xdata *)0xfe30) #define P1IE (*(unsigned char volatile xdata *)0xfe31) #define P2IE (*(unsigned char volatile xdata *)0xfe32) #define P3IE (*(unsigned char volatile xdata *)0xfe33) #define P4IE (*(unsigned char volatile xdata *)0xfe34) #define P5IE (*(unsigned char volatile xdata *)0xfe35) #define P6IE (*(unsigned char volatile xdata *)0xfe36) #define P7IE (*(unsigned char volatile xdata *)0xfe37) #define RTCCR (*(unsigned char volatile xdata *)0xfe60) #define RTCCFG (*(unsigned char volatile xdata *)0xfe61) #define RTCIEN (*(unsigned char volatile xdata *)0xfe62) #define RTCIF (*(unsigned char volatile xdata *)0xfe63) #define ALAHOUR (*(unsigned char volatile xdata *)0xfe64) #define ALAMIN (*(unsigned char volatile xdata *)0xfe65) #define ALASEC (*(unsigned char volatile xdata *)0xfe66) #define ALASSEC (*(unsigned char volatile xdata *)0xfe67) #define INIYEAR (*(unsigned char volatile xdata *)0xfe68) #define INIMONTH (*(unsigned char volatile xdata *)0xfe69) #define INIDAY (*(unsigned char volatile xdata *)0xfe6a) #define INIHOUR (*(unsigned char volatile xdata *)0xfe6b) #define INIMIN (*(unsigned char volatile xdata *)0xfe6c) #define INISEC (*(unsigned char volatile xdata *)0xfe6d) #define INISSEC (*(unsigned char volatile xdata *)0xfe6e) #define YEAR (*(unsigned char volatile xdata *)0xfe70) #define MONTH (*(unsigned char volatile xdata *)0xfe71) #define DAY (*(unsigned char volatile xdata *)0xfe72) #define HOUR (*(unsigned char volatile xdata *)0xfe73) #define MINI (*(unsigned char volatile xdata *)0xfe74) #define SEC (*(unsigned char volatile xdata *)0xfe75) #define SSEC (*(unsigned char volatile xdata *)0xfe76) #define I2CCFG (*(unsigned char volatile xdata *)0xfe80) #define I2CMSCR (*(unsigned char volatile xdata *)0xfe81) #define I2CMSST (*(unsigned char volatile xdata *)0xfe82) #define I2CSLCR (*(unsigned char volatile xdata *)0xfe83) #define I2CSLST (*(unsigned char volatile xdata *)0xfe84) #define I2CSLADR (*(unsigned char volatile xdata *)0xfe85) #define I2CTXD (*(unsigned char volatile xdata *)0xfe86) #define I2CRXD (*(unsigned char volatile xdata *)0xfe87) #define I2CMSAUX (*(unsigned char volatile xdata *)0xfe88) #define TM2PS (*(unsigned char volatile xdata *)0xfea2) #define TM3PS (*(unsigned char volatile xdata *)0xfea3) #define TM4PS (*(unsigned char volatile xdata *)0xfea4) #define ADCTIM (*(unsigned char volatile xdata *)0xfea8) #define T3T4PIN (*(unsigned char volatile xdata *)0xfeac) #define PWM1_ETRPS (*(unsigned char volatile xdata *)0xfeb0) #define PWM1_ENO (*(unsigned char volatile xdata *)0xfeb1) #define PWM1_PS (*(unsigned char volatile xdata *)0xfeb2) #define PWM1_IOAUX (*(unsigned char volatile xdata *)0xfeb3) #define PWM2_ETRPS (*(unsigned char volatile xdata *)0xfeb4) #define PWM2_ENO (*(unsigned char volatile xdata *)0xfeb5) #define PWM2_PS (*(unsigned char volatile xdata *)0xfeb6) #define PWM2_IOAUX (*(unsigned char volatile xdata *)0xfeb7) #define PWM1_CR1 (*(unsigned char volatile xdata *)0xfec0) #define PWM1_CR2 (*(unsigned char volatile xdata *)0xfec1) #define PWM1_SMCR (*(unsigned char volatile xdata *)0xfec2) #define PWM1_ETR (*(unsigned char volatile xdata *)0xfec3) #define PWM1_IER (*(unsigned char volatile xdata *)0xfec4) #define PWM1_SR1 (*(unsigned char volatile xdata *)0xfec5) #define PWM1_SR2 (*(unsigned char volatile xdata *)0xfec6) #define PWM1_EGR (*(unsigned char volatile xdata *)0xfec7) #define PWM1_CCMR1 (*(unsigned char volatile xdata *)0xfec8) #define PWM1_CCMR2 (*(unsigned char volatile xdata *)0xfec9) #define PWM1_CCMR3 (*(unsigned char volatile xdata *)0xfeca) #define PWM1_CCMR4 (*(unsigned char volatile xdata *)0xfecb) #define PWM1_CCER1 (*(unsigned char volatile xdata *)0xfecc) #define PWM1_CCER2 (*(unsigned char volatile xdata *)0xfecd) #define PWM1_CNTR (*(unsigned int volatile xdata *)0xfece) #define PWM1_CNTRH (*(unsigned char volatile xdata *)0xfece) #define PWM1_CNTRL (*(unsigned char volatile xdata *)0xfecf) #define PWM1_PSCR (*(unsigned int volatile xdata *)0xfed0) #define PWM1_PSCRH (*(unsigned char volatile xdata *)0xfed0) #define PWM1_PSCRL (*(unsigned char volatile xdata *)0xfed1) #define PWM1_ARR (*(unsigned int volatile xdata *)0xfed2) #define PWM1_ARRH (*(unsigned char volatile xdata *)0xfed2) #define PWM1_ARRL (*(unsigned char volatile xdata *)0xfed3) #define PWM1_RCR (*(unsigned char volatile xdata *)0xfed4) #define PWM1_CCR1 (*(unsigned int volatile xdata *)0xfed5) #define PWM1_CCR1H (*(unsigned char volatile xdata *)0xfed5) #define PWM1_CCR1L (*(unsigned char volatile xdata *)0xfed6) #define PWM1_CCR2 (*(unsigned int volatile xdata *)0xfed7) #define PWM1_CCR2H (*(unsigned char volatile xdata *)0xfed7) #define PWM1_CCR2L (*(unsigned char volatile xdata *)0xfed8) #define PWM1_CCR3 (*(unsigned int volatile xdata *)0xfed9) #define PWM1_CCR3H (*(unsigned char volatile xdata *)0xfed9) #define PWM1_CCR3L (*(unsigned char volatile xdata *)0xfeda) #define PWM1_CCR4 (*(unsigned int volatile xdata *)0xfedb) #define PWM1_CCR4H (*(unsigned char volatile xdata *)0xfedb) #define PWM1_CCR4L (*(unsigned char volatile xdata *)0xfedc) #define PWM1_BKR (*(unsigned char volatile xdata *)0xfedd) #define PWM1_DTR (*(unsigned char volatile xdata *)0xfede) #define PWM1_OISR (*(unsigned char volatile xdata *)0xfedf) #define PWM2_CR1 (*(unsigned char volatile xdata *)0xfee0) #define PWM2_CR2 (*(unsigned char volatile xdata *)0xfee1) #define PWM2_SMCR (*(unsigned char volatile xdata *)0xfee2) #define PWM2_ETR (*(unsigned char volatile xdata *)0xfee3) #define PWM2_IER (*(unsigned char volatile xdata *)0xfee4) #define PWM2_SR1 (*(unsigned char volatile xdata *)0xfee5) #define PWM2_SR2 (*(unsigned char volatile xdata *)0xfee6) #define PWM2_EGR (*(unsigned char volatile xdata *)0xfee7) #define PWM2_CCMR1 (*(unsigned char volatile xdata *)0xfee8) #define PWM2_CCMR2 (*(unsigned char volatile xdata *)0xfee9) #define PWM2_CCMR3 (*(unsigned char volatile xdata *)0xfeea) #define PWM2_CCMR4 (*(unsigned char volatile xdata *)0xfeeb) #define PWM2_CCER1 (*(unsigned char volatile xdata *)0xfeec) #define PWM2_CCER2 (*(unsigned char volatile xdata *)0xfeed) #define PWM2_CNTR (*(unsigned int volatile xdata *)0xfeee) #define PWM2_CNTRH (*(unsigned char volatile xdata *)0xfeee) #define PWM2_CNTRL (*(unsigned char volatile xdata *)0xfeef) #define PWM2_PSCR (*(unsigned int volatile xdata *)0xfef0) #define PWM2_PSCRH (*(unsigned char volatile xdata *)0xfef0) #define PWM2_PSCRL (*(unsigned char volatile xdata *)0xfef1) #define PWM2_ARR (*(unsigned int volatile xdata *)0xfef2) #define PWM2_ARRH (*(unsigned char volatile xdata *)0xfef2) #define PWM2_ARRL (*(unsigned char volatile xdata *)0xfef3) #define PWM2_RCR (*(unsigned char volatile xdata *)0xfef4) #define PWM2_CCR1 (*(unsigned int volatile xdata *)0xfef5) #define PWM2_CCR1H (*(unsigned char volatile xdata *)0xfef5) #define PWM2_CCR1L (*(unsigned char volatile xdata *)0xfef6) #define PWM2_CCR2 (*(unsigned int volatile xdata *)0xfef7) #define PWM2_CCR2H (*(unsigned char volatile xdata *)0xfef7) #define PWM2_CCR2L (*(unsigned char volatile xdata *)0xfef8) #define PWM2_CCR3 (*(unsigned int volatile xdata *)0xfef9) #define PWM2_CCR3H (*(unsigned char volatile xdata *)0xfef9) #define PWM2_CCR3L (*(unsigned char volatile xdata *)0xfefa) #define PWM2_CCR4 (*(unsigned int volatile xdata *)0xfefb) #define PWM2_CCR4H (*(unsigned char volatile xdata *)0xfefb) #define PWM2_CCR4L (*(unsigned char volatile xdata *)0xfefc) #define PWM2_BKR (*(unsigned char volatile xdata *)0xfefd) #define PWM2_DTR (*(unsigned char volatile xdata *)0xfefe) #define PWM2_OISR (*(unsigned char volatile xdata *)0xfeff) #define PWMA_ETRPS (*(unsigned char volatile xdata *)0xfeb0) #define PWMA_ENO (*(unsigned char volatile xdata *)0xfeb1) #define PWMA_PS (*(unsigned char volatile xdata *)0xfeb2) #define PWMA_IOAUX (*(unsigned char volatile xdata *)0xfeb3) #define PWMB_ETRPS (*(unsigned char volatile xdata *)0xfeb4) #define PWMB_ENO (*(unsigned char volatile xdata *)0xfeb5) #define PWMB_PS (*(unsigned char volatile xdata *)0xfeb6) #define PWMB_IOAUX (*(unsigned char volatile xdata *)0xfeb7) #define PWMA_CR1 (*(unsigned char volatile xdata *)0xfec0) #define PWMA_CR2 (*(unsigned char volatile xdata *)0xfec1) #define PWMA_SMCR (*(unsigned char volatile xdata *)0xfec2) #define PWMA_ETR (*(unsigned char volatile xdata *)0xfec3) #define PWMA_IER (*(unsigned char volatile xdata *)0xfec4) #define PWMA_SR1 (*(unsigned char volatile xdata *)0xfec5) #define PWMA_SR2 (*(unsigned char volatile xdata *)0xfec6) #define PWMA_EGR (*(unsigned char volatile xdata *)0xfec7) #define PWMA_CCMR1 (*(unsigned char volatile xdata *)0xfec8) #define PWMA_CCMR2 (*(unsigned char volatile xdata *)0xfec9) #define PWMA_CCMR3 (*(unsigned char volatile xdata *)0xfeca) #define PWMA_CCMR4 (*(unsigned char volatile xdata *)0xfecb) #define PWMA_CCER1 (*(unsigned char volatile xdata *)0xfecc) #define PWMA_CCER2 (*(unsigned char volatile xdata *)0xfecd) #define PWMA_CNTR (*(unsigned int volatile xdata *)0xfece) #define PWMA_CNTRH (*(unsigned char volatile xdata *)0xfece) #define PWMA_CNTRL (*(unsigned char volatile xdata *)0xfecf) #define PWMA_PSCR (*(unsigned int volatile xdata *)0xfed0) #define PWMA_PSCRH (*(unsigned char volatile xdata *)0xfed0) #define PWMA_PSCRL (*(unsigned char volatile xdata *)0xfed1) #define PWMA_ARR (*(unsigned int volatile xdata *)0xfed2) #define PWMA_ARRH (*(unsigned char volatile xdata *)0xfed2) #define PWMA_ARRL (*(unsigned char volatile xdata *)0xfed3) #define PWMA_RCR (*(unsigned char volatile xdata *)0xfed4) #define PWMA_CCR1 (*(unsigned int volatile xdata *)0xfed5) #define PWMA_CCR1H (*(unsigned char volatile xdata *)0xfed5) #define PWMA_CCR1L (*(unsigned char volatile xdata *)0xfed6) #define PWMA_CCR2 (*(unsigned int volatile xdata *)0xfed7) #define PWMA_CCR2H (*(unsigned char volatile xdata *)0xfed7) #define PWMA_CCR2L (*(unsigned char volatile xdata *)0xfed8) #define PWMA_CCR3 (*(unsigned int volatile xdata *)0xfed9) #define PWMA_CCR3H (*(unsigned char volatile xdata *)0xfed9) #define PWMA_CCR3L (*(unsigned char volatile xdata *)0xfeda) #define PWMA_CCR4 (*(unsigned int volatile xdata *)0xfedb) #define PWMA_CCR4H (*(unsigned char volatile xdata *)0xfedb) #define PWMA_CCR4L (*(unsigned char volatile xdata *)0xfedc) #define PWMA_BKR (*(unsigned char volatile xdata *)0xfedd) #define PWMA_DTR (*(unsigned char volatile xdata *)0xfede) #define PWMA_OISR (*(unsigned char volatile xdata *)0xfedf) #define PWMB_CR1 (*(unsigned char volatile xdata *)0xfee0) #define PWMB_CR2 (*(unsigned char volatile xdata *)0xfee1) #define PWMB_SMCR (*(unsigned char volatile xdata *)0xfee2) #define PWMB_ETR (*(unsigned char volatile xdata *)0xfee3) #define PWMB_IER (*(unsigned char volatile xdata *)0xfee4) #define PWMB_SR1 (*(unsigned char volatile xdata *)0xfee5) #define PWMB_SR2 (*(unsigned char volatile xdata *)0xfee6) #define PWMB_EGR (*(unsigned char volatile xdata *)0xfee7) #define PWMB_CCMR1 (*(unsigned char volatile xdata *)0xfee8) #define PWMB_CCMR2 (*(unsigned char volatile xdata *)0xfee9) #define PWMB_CCMR3 (*(unsigned char volatile xdata *)0xfeea) #define PWMB_CCMR4 (*(unsigned char volatile xdata *)0xfeeb) #define PWMB_CCER1 (*(unsigned char volatile xdata *)0xfeec) #define PWMB_CCER2 (*(unsigned char volatile xdata *)0xfeed) #define PWMB_CNTR (*(unsigned int volatile xdata *)0xfeee) #define PWMB_CNTRH (*(unsigned char volatile xdata *)0xfeee) #define PWMB_CNTRL (*(unsigned char volatile xdata *)0xfeef) #define PWMB_PSCR (*(unsigned int volatile xdata *)0xfef0) #define PWMB_PSCRH (*(unsigned char volatile xdata *)0xfef0) #define PWMB_PSCRL (*(unsigned char volatile xdata *)0xfef1) #define PWMB_ARR (*(unsigned int volatile xdata *)0xfef2) #define PWMB_ARRH (*(unsigned char volatile xdata *)0xfef2) #define PWMB_ARRL (*(unsigned char volatile xdata *)0xfef3) #define PWMB_RCR (*(unsigned char volatile xdata *)0xfef4) #define PWMB_CCR5 (*(unsigned int volatile xdata *)0xfef5) #define PWMB_CCR5H (*(unsigned char volatile xdata *)0xfef5) #define PWMB_CCR5L (*(unsigned char volatile xdata *)0xfef6) #define PWMB_CCR6 (*(unsigned int volatile xdata *)0xfef7) #define PWMB_CCR6H (*(unsigned char volatile xdata *)0xfef7) #define PWMB_CCR6L (*(unsigned char volatile xdata *)0xfef8) #define PWMB_CCR7 (*(unsigned int volatile xdata *)0xfef9) #define PWMB_CCR7H (*(unsigned char volatile xdata *)0xfef9) #define PWMB_CCR7L (*(unsigned char volatile xdata *)0xfefa) #define PWMB_CCR8 (*(unsigned int volatile xdata *)0xfefb) #define PWMB_CCR8H (*(unsigned char volatile xdata *)0xfefb) #define PWMB_CCR8L (*(unsigned char volatile xdata *)0xfefc) #define PWMB_BKR (*(unsigned char volatile xdata *)0xfefd) #define PWMB_DTR (*(unsigned char volatile xdata *)0xfefe) #define PWMB_OISR (*(unsigned char volatile xdata *)0xfeff) ///////////////////////////////////////////////// //FD00H-FDFFH ///////////////////////////////////////////////// #define P0INTE (*(unsigned char volatile xdata *)0xfd00) #define P1INTE (*(unsigned char volatile xdata *)0xfd01) #define P2INTE (*(unsigned char volatile xdata *)0xfd02) #define P3INTE (*(unsigned char volatile xdata *)0xfd03) #define P4INTE (*(unsigned char volatile xdata *)0xfd04) #define P5INTE (*(unsigned char volatile xdata *)0xfd05) #define P6INTE (*(unsigned char volatile xdata *)0xfd06) #define P7INTE (*(unsigned char volatile xdata *)0xfd07) #define P0INTF (*(unsigned char volatile xdata *)0xfd10) #define P1INTF (*(unsigned char volatile xdata *)0xfd11) #define P2INTF (*(unsigned char volatile xdata *)0xfd12) #define P3INTF (*(unsigned char volatile xdata *)0xfd13) #define P4INTF (*(unsigned char volatile xdata *)0xfd14) #define P5INTF (*(unsigned char volatile xdata *)0xfd15) #define P6INTF (*(unsigned char volatile xdata *)0xfd16) #define P7INTF (*(unsigned char volatile xdata *)0xfd17) #define P0IM0 (*(unsigned char volatile xdata *)0xfd20) #define P1IM0 (*(unsigned char volatile xdata *)0xfd21) #define P2IM0 (*(unsigned char volatile xdata *)0xfd22) #define P3IM0 (*(unsigned char volatile xdata *)0xfd23) #define P4IM0 (*(unsigned char volatile xdata *)0xfd24) #define P5IM0 (*(unsigned char volatile xdata *)0xfd25) #define P6IM0 (*(unsigned char volatile xdata *)0xfd26) #define P7IM0 (*(unsigned char volatile xdata *)0xfd27) #define P0IM1 (*(unsigned char volatile xdata *)0xfd30) #define P1IM1 (*(unsigned char volatile xdata *)0xfd31) #define P2IM1 (*(unsigned char volatile xdata *)0xfd32) #define P3IM1 (*(unsigned char volatile xdata *)0xfd33) #define P4IM1 (*(unsigned char volatile xdata *)0xfd34) #define P5IM1 (*(unsigned char volatile xdata *)0xfd35) #define P6IM1 (*(unsigned char volatile xdata *)0xfd36) #define P7IM1 (*(unsigned char volatile xdata *)0xfd37) #define P0WKUE (*(unsigned char volatile xdata *)0xfd40) #define P1WKUE (*(unsigned char volatile xdata *)0xfd41) #define P2WKUE (*(unsigned char volatile xdata *)0xfd42) #define P3WKUE (*(unsigned char volatile xdata *)0xfd43) #define P4WKUE (*(unsigned char volatile xdata *)0xfd44) #define P5WKUE (*(unsigned char volatile xdata *)0xfd45) #define P6WKUE (*(unsigned char volatile xdata *)0xfd46) #define P7WKUE (*(unsigned char volatile xdata *)0xfd47) #define PIN_IP (*(unsigned char volatile xdata *)0xfd60) #define PIN_IPH (*(unsigned char volatile xdata *)0xfd61) ///////////////////////////////////////////////// //FC00H-FCFFH ///////////////////////////////////////////////// #define MD3 (*(unsigned char volatile xdata *)0xfcf0) #define MD2 (*(unsigned char volatile xdata *)0xfcf1) #define MD1 (*(unsigned char volatile xdata *)0xfcf2) #define MD0 (*(unsigned char volatile xdata *)0xfcf3) #define MD5 (*(unsigned char volatile xdata *)0xfcf4) #define MD4 (*(unsigned char volatile xdata *)0xfcf5) #define ARCON (*(unsigned char volatile xdata *)0xfcf6) #define OPCON (*(unsigned char volatile xdata *)0xfcf7) ///////////////////////////////////////////////// //FB00H-FBFFH ///////////////////////////////////////////////// #define COMEN (*(unsigned char volatile xdata *)0xfb00) #define SEGENL (*(unsigned char volatile xdata *)0xfb01) #define SEGENH (*(unsigned char volatile xdata *)0xfb02) #define LEDCTRL (*(unsigned char volatile xdata *)0xfb03) #define LEDCKS (*(unsigned char volatile xdata *)0xfb04) #define COM0_DA_L (*(unsigned char volatile xdata *)0xfb10) #define COM1_DA_L (*(unsigned char volatile xdata *)0xfb11) #define COM2_DA_L (*(unsigned char volatile xdata *)0xfb12) #define COM3_DA_L (*(unsigned char volatile xdata *)0xfb13) #define COM4_DA_L (*(unsigned char volatile xdata *)0xfb14) #define COM5_DA_L (*(unsigned char volatile xdata *)0xfb15) #define COM6_DA_L (*(unsigned char volatile xdata *)0xfb16) #define COM7_DA_L (*(unsigned char volatile xdata *)0xfb17) #define COM0_DA_H (*(unsigned char volatile xdata *)0xfb18) #define COM1_DA_H (*(unsigned char volatile xdata *)0xfb19) #define COM2_DA_H (*(unsigned char volatile xdata *)0xfb1a) #define COM3_DA_H (*(unsigned char volatile xdata *)0xfb1b) #define COM4_DA_H (*(unsigned char volatile xdata *)0xfb1c) #define COM5_DA_H (*(unsigned char volatile xdata *)0xfb1d) #define COM6_DA_H (*(unsigned char volatile xdata *)0xfb1e) #define COM7_DA_H (*(unsigned char volatile xdata *)0xfb1f) #define COM0_DC_L (*(unsigned char volatile xdata *)0xfb20) #define COM1_DC_L (*(unsigned char volatile xdata *)0xfb21) #define COM2_DC_L (*(unsigned char volatile xdata *)0xfb22) #define COM3_DC_L (*(unsigned char volatile xdata *)0xfb23) #define COM4_DC_L (*(unsigned char volatile xdata *)0xfb24) #define COM5_DC_L (*(unsigned char volatile xdata *)0xfb25) #define COM6_DC_L (*(unsigned char volatile xdata *)0xfb26) #define COM7_DC_L (*(unsigned char volatile xdata *)0xfb27) #define COM0_DC_H (*(unsigned char volatile xdata *)0xfb28) #define COM1_DC_H (*(unsigned char volatile xdata *)0xfb29) #define COM2_DC_H (*(unsigned char volatile xdata *)0xfb2a) #define COM3_DC_H (*(unsigned char volatile xdata *)0xfb2b) #define COM4_DC_H (*(unsigned char volatile xdata *)0xfb2c) #define COM5_DC_H (*(unsigned char volatile xdata *)0xfb2d) #define COM6_DC_H (*(unsigned char volatile xdata *)0xfb2e) #define COM7_DC_H (*(unsigned char volatile xdata *)0xfb2f) #define TSCHEN1 (*(unsigned char volatile xdata *)0xfb40) #define TSCHEN2 (*(unsigned char volatile xdata *)0xfb41) #define TSCFG1 (*(unsigned char volatile xdata *)0xfb42) #define TSCFG2 (*(unsigned char volatile xdata *)0xfb43) #define TSWUTC (*(unsigned char volatile xdata *)0xfb44) #define TSCTRL (*(unsigned char volatile xdata *)0xfb45) #define TSSTA1 (*(unsigned char volatile xdata *)0xfb46) #define TSSTA2 (*(unsigned char volatile xdata *)0xfb47) #define TSRT (*(unsigned char volatile xdata *)0xfb48) #define TSDAT (*(unsigned int volatile xdata *)0xfb49) #define TSDATH (*(unsigned char volatile xdata *)0xfb49) #define TSDATL (*(unsigned char volatile xdata *)0xfb4A) #define TSTH00 (*(unsigned int volatile xdata *)0xfb50) #define TSTH00H (*(unsigned char volatile xdata *)0xfb50) #define TSTH00L (*(unsigned char volatile xdata *)0xfb51) #define TSTH01 (*(unsigned int volatile xdata *)0xfb52) #define TSTH01H (*(unsigned char volatile xdata *)0xfb52) #define TSTH01L (*(unsigned char volatile xdata *)0xfb53) #define TSTH02 (*(unsigned int volatile xdata *)0xfb54) #define TSTH02H (*(unsigned char volatile xdata *)0xfb54) #define TSTH02L (*(unsigned char volatile xdata *)0xfb55) #define TSTH03 (*(unsigned int volatile xdata *)0xfb56) #define TSTH03H (*(unsigned char volatile xdata *)0xfb56) #define TSTH03L (*(unsigned char volatile xdata *)0xfb57) #define TSTH04 (*(unsigned int volatile xdata *)0xfb58) #define TSTH04H (*(unsigned char volatile xdata *)0xfb58) #define TSTH04L (*(unsigned char volatile xdata *)0xfb59) #define TSTH05 (*(unsigned int volatile xdata *)0xfb5a) #define TSTH05H (*(unsigned char volatile xdata *)0xfb5a) #define TSTH05L (*(unsigned char volatile xdata *)0xfb5b) #define TSTH06 (*(unsigned int volatile xdata *)0xfb5c) #define TSTH06H (*(unsigned char volatile xdata *)0xfb5c) #define TSTH06L (*(unsigned char volatile xdata *)0xfb5d) #define TSTH07 (*(unsigned int volatile xdata *)0xfb5e) #define TSTH07H (*(unsigned char volatile xdata *)0xfb5e) #define TSTH07L (*(unsigned char volatile xdata *)0xfb5f) #define TSTH08 (*(unsigned int volatile xdata *)0xfb60) #define TSTH08H (*(unsigned char volatile xdata *)0xfb60) #define TSTH08L (*(unsigned char volatile xdata *)0xfb61) #define TSTH09 (*(unsigned int volatile xdata *)0xfb62) #define TSTH09H (*(unsigned char volatile xdata *)0xfb62) #define TSTH09L (*(unsigned char volatile xdata *)0xfb63) #define TSTH10 (*(unsigned int volatile xdata *)0xfb64) #define TSTH10H (*(unsigned char volatile xdata *)0xfb64) #define TSTH10L (*(unsigned char volatile xdata *)0xfb65) #define TSTH11 (*(unsigned int volatile xdata *)0xfb66) #define TSTH11H (*(unsigned char volatile xdata *)0xfb66) #define TSTH11L (*(unsigned char volatile xdata *)0xfb67) #define TSTH12 (*(unsigned int volatile xdata *)0xfb68) #define TSTH12H (*(unsigned char volatile xdata *)0xfb68) #define TSTH12L (*(unsigned char volatile xdata *)0xfb69) #define TSTH13 (*(unsigned int volatile xdata *)0xfb6a) #define TSTH13H (*(unsigned char volatile xdata *)0xfb6a) #define TSTH13L (*(unsigned char volatile xdata *)0xfb6b) #define TSTH14 (*(unsigned int volatile xdata *)0xfb6c) #define TSTH14H (*(unsigned char volatile xdata *)0xfb6c) #define TSTH14L (*(unsigned char volatile xdata *)0xfb6d) #define TSTH15 (*(unsigned int volatile xdata *)0xfb6e) #define TSTH15H (*(unsigned char volatile xdata *)0xfb6e) #define TSTH15L (*(unsigned char volatile xdata *)0xfb6f) ///////////////////////////////////////////////// //FA00H-FAFFH ///////////////////////////////////////////////// #define DMA_ADC_CFG (*(unsigned char volatile xdata *)0xfa10) #define DMA_ADC_CR (*(unsigned char volatile xdata *)0xfa11) #define DMA_ADC_STA (*(unsigned char volatile xdata *)0xfa12) #define DMA_ADC_RXA (*(unsigned int volatile xdata *)0xfa17) #define DMA_ADC_RXAH (*(unsigned char volatile xdata *)0xfa17) #define DMA_ADC_RXAL (*(unsigned char volatile xdata *)0xfa18) #define DMA_ADC_CFG2 (*(unsigned char volatile xdata *)0xfa19) #define DMA_ADC_CHSW0 (*(unsigned char volatile xdata *)0xfa1a) #define DMA_ADC_CHSW1 (*(unsigned char volatile xdata *)0xfa1b) #define DMA_SPI_CFG (*(unsigned char volatile xdata *)0xfa20) #define DMA_SPI_CR (*(unsigned char volatile xdata *)0xfa21) #define DMA_SPI_STA (*(unsigned char volatile xdata *)0xfa22) #define DMA_SPI_AMT (*(unsigned char volatile xdata *)0xfa23) #define DMA_SPI_DONE (*(unsigned char volatile xdata *)0xfa24) #define DMA_SPI_TXA (*(unsigned int volatile xdata *)0xfa25) #define DMA_SPI_TXAH (*(unsigned char volatile xdata *)0xfa25) #define DMA_SPI_TXAL (*(unsigned char volatile xdata *)0xfa26) #define DMA_SPI_RXA (*(unsigned int volatile xdata *)0xfa27) #define DMA_SPI_RXAH (*(unsigned char volatile xdata *)0xfa27) #define DMA_SPI_RXAL (*(unsigned char volatile xdata *)0xfa28) #define DMA_SPI_CFG2 (*(unsigned char volatile xdata *)0xfa29) #define DMA_UR1T_CFG (*(unsigned char volatile xdata *)0xfa30) #define DMA_UR1T_CR (*(unsigned char volatile xdata *)0xfa31) #define DMA_UR1T_STA (*(unsigned char volatile xdata *)0xfa32) #define DMA_UR1T_AMT (*(unsigned char volatile xdata *)0xfa33) #define DMA_UR1T_DONE (*(unsigned char volatile xdata *)0xfa34) #define DMA_UR1T_TXA (*(unsigned int volatile xdata *)0xfa35) #define DMA_UR1T_TXAH (*(unsigned char volatile xdata *)0xfa35) #define DMA_UR1T_TXAL (*(unsigned char volatile xdata *)0xfa36) #define DMA_UR1R_CFG (*(unsigned char volatile xdata *)0xfa38) #define DMA_UR1R_CR (*(unsigned char volatile xdata *)0xfa39) #define DMA_UR1R_STA (*(unsigned char volatile xdata *)0xfa3a) #define DMA_UR1R_AMT (*(unsigned char volatile xdata *)0xfa3b) #define DMA_UR1R_DONE (*(unsigned char volatile xdata *)0xfa3c) #define DMA_UR1R_RXA (*(unsigned int volatile xdata *)0xfa3d) #define DMA_UR1R_RXAH (*(unsigned char volatile xdata *)0xfa3d) #define DMA_UR1R_RXAL (*(unsigned char volatile xdata *)0xfa3e) #define DMA_UR2T_CFG (*(unsigned char volatile xdata *)0xfa40) #define DMA_UR2T_CR (*(unsigned char volatile xdata *)0xfa41) #define DMA_UR2T_STA (*(unsigned char volatile xdata *)0xfa42) #define DMA_UR2T_AMT (*(unsigned char volatile xdata *)0xfa43) #define DMA_UR2T_DONE (*(unsigned char volatile xdata *)0xfa44) #define DMA_UR2T_TXA (*(unsigned int volatile xdata *)0xfa45) #define DMA_UR2T_TXAH (*(unsigned char volatile xdata *)0xfa45) #define DMA_UR2T_TXAL (*(unsigned char volatile xdata *)0xfa46) #define DMA_UR2R_CFG (*(unsigned char volatile xdata *)0xfa48) #define DMA_UR2R_CR (*(unsigned char volatile xdata *)0xfa49) #define DMA_UR2R_STA (*(unsigned char volatile xdata *)0xfa4a) #define DMA_UR2R_AMT (*(unsigned char volatile xdata *)0xfa4b) #define DMA_UR2R_DONE (*(unsigned char volatile xdata *)0xfa4c) #define DMA_UR2R_RXA (*(unsigned int volatile xdata *)0xfa4d) #define DMA_UR2R_RXAH (*(unsigned char volatile xdata *)0xfa4d) #define DMA_UR2R_RXAL (*(unsigned char volatile xdata *)0xfa4e) #define DMA_UR3T_CFG (*(unsigned char volatile xdata *)0xfa50) #define DMA_UR3T_CR (*(unsigned char volatile xdata *)0xfa51) #define DMA_UR3T_STA (*(unsigned char volatile xdata *)0xfa52) #define DMA_UR3T_AMT (*(unsigned char volatile xdata *)0xfa53) #define DMA_UR3T_DONE (*(unsigned char volatile xdata *)0xfa54) #define DMA_UR3T_TXA (*(unsigned int volatile xdata *)0xfa55) #define DMA_UR3T_TXAH (*(unsigned char volatile xdata *)0xfa55) #define DMA_UR3T_TXAL (*(unsigned char volatile xdata *)0xfa56) #define DMA_UR3R_CFG (*(unsigned char volatile xdata *)0xfa58) #define DMA_UR3R_CR (*(unsigned char volatile xdata *)0xfa59) #define DMA_UR3R_STA (*(unsigned char volatile xdata *)0xfa5a) #define DMA_UR3R_AMT (*(unsigned char volatile xdata *)0xfa5b) #define DMA_UR3R_DONE (*(unsigned char volatile xdata *)0xfa5c) #define DMA_UR3R_RXA (*(unsigned int volatile xdata *)0xfa5d) #define DMA_UR3R_RXAH (*(unsigned char volatile xdata *)0xfa5d) #define DMA_UR3R_RXAL (*(unsigned char volatile xdata *)0xfa5e) #define DMA_UR4T_CFG (*(unsigned char volatile xdata *)0xfa60) #define DMA_UR4T_CR (*(unsigned char volatile xdata *)0xfa61) #define DMA_UR4T_STA (*(unsigned char volatile xdata *)0xfa62) #define DMA_UR4T_AMT (*(unsigned char volatile xdata *)0xfa63) #define DMA_UR4T_DONE (*(unsigned char volatile xdata *)0xfa64) #define DMA_UR4T_TXA (*(unsigned int volatile xdata *)0xfa65) #define DMA_UR4T_TXAH (*(unsigned char volatile xdata *)0xfa65) #define DMA_UR4T_TXAL (*(unsigned char volatile xdata *)0xfa66) #define DMA_UR4R_CFG (*(unsigned char volatile xdata *)0xfa68) #define DMA_UR4R_CR (*(unsigned char volatile xdata *)0xfa69) #define DMA_UR4R_STA (*(unsigned char volatile xdata *)0xfa6a) #define DMA_UR4R_AMT (*(unsigned char volatile xdata *)0xfa6b) #define DMA_UR4R_DONE (*(unsigned char volatile xdata *)0xfa6c) #define DMA_UR4R_RXA (*(unsigned int volatile xdata *)0xfa6d) #define DMA_UR4R_RXAH (*(unsigned char volatile xdata *)0xfa6d) #define DMA_UR4R_RXAL (*(unsigned char volatile xdata *)0xfa6e) #define DMA_LCM_CFG (*(unsigned char volatile xdata *)0xfa70) #define DMA_LCM_CR (*(unsigned char volatile xdata *)0xfa71) #define DMA_LCM_STA (*(unsigned char volatile xdata *)0xfa72) #define DMA_LCM_AMT (*(unsigned char volatile xdata *)0xfa73) #define DMA_LCM_DONE (*(unsigned char volatile xdata *)0xfa74) #define DMA_LCM_TXA (*(unsigned int volatile xdata *)0xfa75) #define DMA_LCM_TXAH (*(unsigned char volatile xdata *)0xfa75) #define DMA_LCM_TXAL (*(unsigned char volatile xdata *)0xfa76) #define DMA_LCM_RXA (*(unsigned int volatile xdata *)0xfa77) #define DMA_LCM_RXAH (*(unsigned char volatile xdata *)0xfa77) #define DMA_LCM_RXAL (*(unsigned char volatile xdata *)0xfa78) ///////////////////////////////////////////////// #if 0 //包含本头文件后,不用另外再包含"REG51.H" //内核特殊功能寄存器 // 复位值 描述 sfr ACC = 0xE0; //0000,0000 累加器Accumulator sfr B = 0xF0; //0000,0000 B寄存器 sfr PSW = 0xD0; //0000,0000 程序状态字 sbit CY = PSW^7; sbit AC = PSW^6; sbit F0 = PSW^5; sbit RS1 = PSW^4; sbit RS0 = PSW^3; sbit OV = PSW^2; sbit P = PSW^0; sfr SP = 0x81; //0000,0111 堆栈指针 sfr DPL = 0x82; //0000,0000 数据指针低字节 sfr DPH = 0x83; //0000,0000 数据指针高字节 //I/O 口特殊功能寄存器 sfr P0 = 0x80; //1111,1111 端口0 sbit P00 = P0^0; sbit P01 = P0^1; sbit P02 = P0^2; sbit P03 = P0^3; sbit P04 = P0^4; sbit P05 = P0^5; sbit P06 = P0^6; sbit P07 = P0^7; sfr P1 = 0x90; //1111,1111 端口1 sbit P10 = P1^0; sbit P11 = P1^1; sbit P12 = P1^2; sbit P13 = P1^3; sbit P14 = P1^4; sbit P15 = P1^5; sbit P16 = P1^6; sbit P17 = P1^7; sfr P2 = 0xA0; //1111,1111 端口2 sbit P20 = P2^0; sbit P21 = P2^1; sbit P22 = P2^2; sbit P23 = P2^3; sbit P24 = P2^4; sbit P25 = P2^5; sbit P26 = P2^6; sbit P27 = P2^7; sfr P3 = 0xB0; //1111,1111 端口3 sbit P30 = P3^0; sbit P31 = P3^1; sbit P32 = P3^2; sbit P33 = P3^3; sbit P34 = P3^4; sbit P35 = P3^5; sbit P36 = P3^6; sbit P37 = P3^7; sfr P4 = 0xC0; //1111,1111 端口4 sbit P40 = P4^0; sbit P41 = P4^1; sbit P42 = P4^2; sbit P43 = P4^3; sbit P44 = P4^4; sbit P45 = P4^5; sbit P46 = P4^6; sbit P47 = P4^7; sfr P5 = 0xC8; //xxxx,1111 端口5 sbit P50 = P5^0; sbit P51 = P5^1; sbit P52 = P5^2; sbit P53 = P5^3; sbit P54 = P5^4; sbit P55 = P5^5; sbit P56 = P5^6; sbit P57 = P5^7; sfr P6 = 0xE8; //0000,0000 端口6 sbit P60 = P6^0; sbit P61 = P6^1; sbit P62 = P6^2; sbit P63 = P6^3; sbit P64 = P6^4; sbit P65 = P6^5; sbit P66 = P6^6; sbit P67 = P6^7; sfr P7 = 0xF8; //0000,0000 端口7 sbit P70 = P7^0; sbit P71 = P7^1; sbit P72 = P7^2; sbit P73 = P7^3; sbit P74 = P7^4; sbit P75 = P7^5; sbit P76 = P7^6; sbit P77 = P7^7; ///00 准双向口 灌电流20mA 拉电流270-150uS ///01 推挽输出 20mA 加限流 ///10 高阻 ///11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 sfr P0M0 = 0x94; //0000,0000 端口0模式寄存器0 sfr P0M1 = 0x93; //0000,0000 端口0模式寄存器1 sfr P1M0 = 0x92; //0000,0000 端口1模式寄存器0 sfr P1M1 = 0x91; //0000,0000 端口1模式寄存器1 sfr P2M0 = 0x96; //0000,0000 端口2模式寄存器0 sfr P2M1 = 0x95; //0000,0000 端口2模式寄存器1 sfr P3M0 = 0xB2; //0000,0000 端口3模式寄存器0 sfr P3M1 = 0xB1; //0000,0000 端口3模式寄存器1 sfr P4M0 = 0xB4; //0000,0000 端口4模式寄存器0 sfr P4M1 = 0xB3; //0000,0000 端口4模式寄存器1 sfr P5M0 = 0xCA; //0000,0000 端口5模式寄存器0 sfr P5M1 = 0xC9; //0000,0000 端口5模式寄存器1 sfr P6M0 = 0xCC; //0000,0000 端口6模式寄存器0 sfr P6M1 = 0xCB; //0000,0000 端口6模式寄存器1 sfr P7M0 = 0xE2; //0000,0000 端口7模式寄存器0 sfr P7M1 = 0xE1; //0000,0000 端口7模式寄存器1 //系统管理特殊功能寄存器 sfr PCON = 0x87; //0001,0000 电源控制寄存器 sfr AUXR = 0x8E; //0000,0000 辅助寄存器 #define TOx12 BITN7 #define T1x12 BITN6 #define UART_M0x6 BITN5 //串口1模式0速度 =0 12倍 = 1 两倍 #define T2R BITN4 //定时器2 运行 =1 #define T2_C BITN3 //定时器/计数器选择 #define T2x12 BITN2 #define EXTRAM BITN1 #define S1ST2 BITN0 //串口1选择定时器1 =0 选择定时器2 =1 sfr VOCTR = 0xBB; //电压控制寄存器 ///BITN_1(VOCTR, BITN7) VOCTR #define D_VOCTR_SCCIN 0x00 #define D_VOCTR_SCC 0x80 #define D_VOCTR_SET(X) VOCTR = (X) sfr AUXR1 = 0xA2; //0000,0000 辅助寄存器1 sfr P_SW1 = 0xA2; //0000,0000 外设端口切换寄存器1 sfr CLK_DIV = 0x97; //0000,0000 时钟分频控制寄存器 sfr BUS_SPEED = 0xA1; //xx10,x011 总线速度控制寄存器 sfr P1ASF = 0x9D; //0000,0000 端口1模拟功能配置寄存器 //----------------------------------------------------------------- sfr P_SW2 = 0xBA; //0xxx,x000 外设端口切换寄存器 #define EAXFR BITN7 #define I2C_S1 BITN5 #define I2C_S2 BITN4 #define CMPO_S BITN3 #define S4_S BITN2 #define S3_S BITN1 #define S2_S BITN0 //----------------------------------------------------------------- //中断特殊功能寄存器 sfr IE = 0xA8; //0000,0000 中断控制寄存器 sbit EA = IE^7; sbit ELVD = IE^6; sbit EADC = IE^5; sbit ES = IE^4; sbit ET1 = IE^3; sbit EX1 = IE^2; sbit ET0 = IE^1; sbit EX0 = IE^0; sfr IE2 = 0xAF; //0000,0000 中断控制寄存器2 sfr IP = 0xB8; //0000,0000 中断优先级寄存器 sbit PPCA = IP^7; sbit PLVD = IP^6; sbit PADC = IP^5; sbit PS = IP^4; sbit PT1 = IP^3; sbit PX1 = IP^2; sbit PT0 = IP^1; sbit PX0 = IP^0; /// 不可位寻址 #define ET4 BITN6 #define ET3 BITN5 #define ES4 BITN4 #define ES3 BITN3 #define ET2 BITN2 #define ESPI BITN1 #define ES2 BITN0 sfr IPH = 0xB7; //xxxx,xx00 中断优先级寄存器2 #define PPCAH BITN7 #define PLVDH BITN6 #define PADCH BITN5 #define PSH BITN4 #define PT1H BITN3 #define PX1H BITN2 #define PT0H BITN1 #define PX0H BITN0 sfr IP2 = 0xB5; //xxxx,xx00 中断优先级寄存器2 #define IP2_7 BITN7 #define PI2C BITN6 #define PCMP BITN5 #define PX4 BITN4 #define PPWMFD BITN3 #define PPWM BITN2 #define PSPI BITN1 #define PS2 BITN0 sfr IP2H = 0xB6; //xxxx,xx00 中断优先级寄存器2 #define IP2_7 BITN7 #define PI2CH BITN6 #define PCMPH BITN5 #define PX4H BITN4 #define PPWMFDH BITN3 #define PPWMH BITN2 #define PSPIH BITN1 #define PS2H BITN0 sfr INT_CLKO = 0x8F; //0000,0000 外部中断与时钟输出控制寄存器 #define INT_EX4 BITN6 #define INT_EX3 BITN5 #define INT_EX2 BITN4 //定时器特殊功能寄存器 sfr TCON = 0x88; //0000,0000 T0/T1控制寄存器 sbit TF1 = TCON^7; sbit TR1 = TCON^6; sbit TF0 = TCON^5; sbit TR0 = TCON^4; sbit IE1 = TCON^3; sbit IT1 = TCON^2; sbit IE0 = TCON^1; sbit IT0 = TCON^0; sfr TMOD = 0x89; //0000,0000 T0/T1模式寄存器 sfr TL0 = 0x8A; //0000,0000 T0低字节 sfr TL1 = 0x8B; //0000,0000 T1低字节 sfr TH0 = 0x8C; //0000,0000 T0高字节 sfr TH1 = 0x8D; //0000,0000 T1高字节 sfr T4T3M = 0xD1; //0000,0000 T3/T4模式寄存器 sfr T3T4M = 0xD1; //0000,0000 T3/T4模式寄存器 sfr T4H = 0xD2; //0000,0000 T4高字节 sfr T4L = 0xD3; //0000,0000 T4低字节 sfr T3H = 0xD4; //0000,0000 T3高字节 sfr T3L = 0xD5; //0000,0000 T3低字节 sfr T2H = 0xD6; //0000,0000 T2高字节 sfr T2L = 0xD7; //0000,0000 T2低字节 sfr WKTCL = 0xAA; //0000,0000 掉电唤醒定时器低字节 sfr WKTCH = 0xAB; //0000,0000 掉电唤醒定时器高字节 sfr16 WKTC = 0xAA; sfr WDT_CONTR = 0xC1; //0000,0000 看门狗控制寄存器 //串行口特殊功能寄存器 sfr SCON = 0x98; //0000,0000 串口1控制寄存器 sbit SM0 = SCON^7; sbit SM1 = SCON^6; sbit SM2 = SCON^5; sbit REN = SCON^4; sbit TB8 = SCON^3; sbit RB8 = SCON^2; sbit TI = SCON^1; sbit RI = SCON^0; //sfr SBUF = 0x99; //xxxx,xxxx 串口1数据寄存器 //sfr S2CON = 0x9A; //0000,0000 串口2控制寄存器 //sfr S2BUF = 0x9B; //xxxx,xxxx 串口2数据寄存器 //sfr SADDR = 0xA9; //0000,0000 从机地址寄存器 //sfr SADEN = 0xB9; //0000,0000 从机地址屏蔽寄存器 sfr SBUF = 0x99; //Serial Data Buffer sfr SBUF0 = 0x99; //Serial Data Buffer xxxx,xxxx sfr SADEN = 0xB9; //Slave Address Mask 0000,0000 sfr SADDR = 0xA9; //Slave Address 0000,0000 //----------------------------------- // 7 6 5 4 3 2 1 0 Reset Value sfr S2CON = 0x9A; //S2 Control S2SM0 S2SM1 S2SM2 S2REN S2TB8 S2RB8 S2TI S2RI 00000000B #define S2SM0 BITN7 #define S2ST4 BITN6 #define S2SM2 BITN5 #define S2REN BITN4 #define S2TB8 BITN3 #define S2RB8 BITN2 #define S2TI BITN1 #define S2RI BITN0 sfr S2BUF = 0x9B; //S2 Serial Buffer xxxx,xxxx //sfr BRT = 0x9C; //S2 Baud-Rate Timer 0000,0000 //--------------------------------------------------------------- sfr S3CON = 0xAC; //0000,0000 串口3控制寄存器 #define S3SM0 BITN7 #define S3ST4 BITN6 #define S3SM2 BITN5 #define S3REN BITN4 #define S3TB8 BITN3 #define S3RB8 BITN2 #define S3TI BITN1 #define S3RI BITN0 sfr S3BUF = 0xAD; //xxxx,xxxx 串口3数据寄存器 //--------------------------------------------------------------- sfr S4CON = 0x84; //0000,0000 串口4控制寄存器 #define S4SM0 BITN7 #define S4ST4 BITN6 #define S4SM2 BITN5 #define S4REN BITN4 #define S4TB8 BITN3 #define S4RB8 BITN2 #define S4TI BITN1 #define S4RI BITN0 sfr S4BUF = 0x85; //xxxx,xxxx 串口4数据寄存器 //ADC 特殊功能寄存器 sfr ADC_CONTR = 0xBC; //0000,0000 A/D转换控制寄存器 sfr ADC_RES = 0xBD; //0000,0000 A/D转换结果高8位 sfr ADC_RESL = 0xBE; //0000,0000 A/D转换结果低2位 //SPI 特殊功能寄存器 sfr SPSTAT = 0xCD; //00xx,xxxx SPI状态寄存器 sfr SPCTL = 0xCE; //0000,0100 SPI控制寄存器 sfr SPDAT = 0xCF; //0000,0000 SPI数据寄存器 //IAP/ISP 特殊功能寄存器 sfr IAP_DATA = 0xC2; //0000,0000 EEPROM数据寄存器 sfr IAP_ADDRH = 0xC3; //0000,0000 EEPROM地址高字节 sfr IAP_ADDRL = 0xC4; //0000,0000 EEPROM地址第字节 sfr IAP_CMD = 0xC5; //xxxx,xx00 EEPROM命令寄存器 sfr IAP_TRIG = 0xC6; //0000,0000 EEPRPM命令触发寄存器 sfr IAP_CONTR = 0xC7; //0000,x000 EEPROM控制寄存器 //PCA/PWM 特殊功能寄存器 sfr CCON = 0xD8; //00xx,xx00 PCA控制寄存器 sbit CF = CCON^7; sbit CR = CCON^6; sbit CCF2 = CCON^2; sbit CCF1 = CCON^1; sbit CCF0 = CCON^0; sfr CMOD = 0xD9; //0xxx,x000 PCA 工作模式寄存器 sfr CL = 0xE9; //0000,0000 PCA计数器低字节 sfr CH = 0xF9; //0000,0000 PCA计数器高字节 sfr CCAPM0 = 0xDA; //0000,0000 PCA模块0的PWM寄存器 sfr CCAPM1 = 0xDB; //0000,0000 PCA模块1的PWM寄存器 sfr CCAPM2 = 0xDC; //0000,0000 PCA模块2的PWM 寄存器 sfr CCAP0L = 0xEA; //0000,0000 PCA模块0的捕捉/比较寄存器低字节 sfr CCAP1L = 0xEB; //0000,0000 PCA模块1的捕捉/比较寄存器低字节 sfr CCAP2L = 0xEC; //0000,0000 PCA模块2的捕捉/比较寄存器低字节 sfr PCA_PWM0 = 0xF2; //xxxx,xx00 PCA模块0的PWM寄存器 sfr PCA_PWM1 = 0xF3; //xxxx,xx00 PCA模块1的PWM寄存器 sfr PCA_PWM2 = 0xF4; //xxxx,xx00 PCA模块1的PWM寄存器 sfr CCAP0H = 0xFA; //0000,0000 PCA模块0的捕捉/比较寄存器高字节 sfr CCAP1H = 0xFB; //0000,0000 PCA模块1的捕捉/比较寄存器高字节 sfr CCAP2H = 0xFC; //0000,0000 PCA模块2的捕捉/比较寄存器高字节 //比较器特殊功能寄存器 sfr CMPCR1 = 0xE6; //0000,0000 比较器控制寄存器1 sfr CMPCR2 = 0xE7; //0000,0000 比较器控制寄存器2 //sfr P_SW2 = 0xba; sfr PWMCFG = 0xf1; sfr PWMIF = 0xf6; sfr PWMFDCR = 0xf7; sfr PWMCR = 0xfe; #define PWMC (*(unsigned int volatile xdata *)0xfff0) #define PWMCKS (*(unsigned char volatile xdata *)0xfff2) #define TADCP (*(unsigned int volatile xdata *)0xfff3) #define PWM0T1 (*(unsigned int volatile xdata *)0xff00) #define PWM0T2 (*(unsigned int volatile xdata *)0xff02) #define PWM0CR (*(unsigned char volatile xdata *)0xff04) #define PWM0HLD (*(unsigned char volatile xdata *)0xff05) #define PWM1T1 (*(unsigned int volatile xdata *)0xff10) #define PWM1T2 (*(unsigned int volatile xdata *)0xff12) #define PWM1CR (*(unsigned char volatile xdata *)0xff14) #define PWM1HLD (*(unsigned char volatile xdata *)0xff15) #define PWM2T1 (*(unsigned int volatile xdata *)0xff20) #define PWM2T2 (*(unsigned int volatile xdata *)0xff22) #define PWM2CR (*(unsigned char volatile xdata *)0xff24) #define PWM2HLD (*(unsigned char volatile xdata *)0xff25) #define PWM3T1 (*(unsigned int volatile xdata *)0xff30) #define PWM3T2 (*(unsigned int volatile xdata *)0xff32) #define PWM3CR (*(unsigned char volatile xdata *)0xff34) #define PWM3HLD (*(unsigned char volatile xdata *)0xff35) #define PWM4T1 (*(unsigned int volatile xdata *)0xff40) #define PWM4T2 (*(unsigned int volatile xdata *)0xff42) #define PWM4CR (*(unsigned char volatile xdata *)0xff44) #define PWM4HLD (*(unsigned char volatile xdata *)0xff45) #define PWM5T1 (*(unsigned int volatile xdata *)0xff50) #define PWM5T2 (*(unsigned int volatile xdata *)0xff52) #define PWM5CR (*(unsigned char volatile xdata *)0xff54) #define PWM5HLD (*(unsigned char volatile xdata *)0xff55) #define PWM6T1 (*(unsigned int volatile xdata *)0xff60) #define PWM6T2 (*(unsigned int volatile xdata *)0xff62) #define PWM6CR (*(unsigned char volatile xdata *)0xff64) #define PWM6HLD (*(unsigned char volatile xdata *)0xff65) #define PWM7T1 (*(unsigned int volatile xdata *)0xff70) #define PWM7T2 (*(unsigned int volatile xdata *)0xff72) #define PWM7CR (*(unsigned char volatile xdata *)0xff74) #define PWM7HLD (*(unsigned char volatile xdata *)0xff75) #define CKSEL (*(unsigned char volatile xdata *)0xfE00)//108@ST8.PDF #define MCLKODIV BIT4 #define MCLKO_S BITN3 #define MCLKSEL BIT0 #define CLKDIV (*(unsigned char volatile xdata *)0xfE01)//108@ST8.PDF #define IRC24MCR (*(unsigned char volatile xdata *)0xfE02)//108@ST8.PDF #define XOSCCR (*(unsigned char volatile xdata *)0xfE03)//108@ST8.PDF #define IRC32KCR (*(unsigned char volatile xdata *)0xfE04)//108@ST8.PDF #endif #if 0 ///已经放到了stc only中 #define I2CTXD (*(unsigned char volatile xdata *)0xfE86)//423@ST8.PDF #define I2CRXD (*(unsigned char volatile xdata *)0xfE87)//423@ST8.PDF ///------------------------------------- #define gRccUs01_H (*(unsigned char volatile data *)0xd2) #define gRccUs01_L (*(unsigned char volatile data *)0xd3) #define gRccUs01 (*(unsigned short volatile data *)0xd2)//226@ST8.PDF T4H定时器4的高字节 D2H T4H定时器4的低字节 D3H #define gRccUs02 (*(unsigned short volatile data *)0xEA)//351@ST8.PDF CCAP0l CCAP1L EAH EBH #define gRccUs03 (*(unsigned short volatile data *)0xEC)//351@ST8.PDF CCAP0l CCAP1L EAH EBH //#define gRccUs03 s_task_GC032A.n #define gRccUs04 (*(unsigned short volatile data *)0xFA)///351@ST8.PDF #define gRccUs05 (*(unsigned short volatile data *)0xFC)///351@ST8.PD CCAP2H ///////////////////////////////////////////////// /* P3 */ sbit RD = 0xB7; sbit WR = 0xB6; sbit T1 = 0xB5; sbit T0 = 0xB4; sbit INT1 = 0xB3; sbit INT0 = 0xB2; sbit TXD = 0xB1; sbit RXD = 0xB0; sfr AUXINTIF = 0xef; #define T2IF 0x01 #define INT4IF BITN6 #define INT3IF BITN5 #define INT2IF BITN4 //#define T4IF BITN2 //#define T3IF BITN1 //#define T2IF BITN0 /// >>>>> add by cc #include "../clib/bit.h" #define D_stdIO_P0_ALL() P0M1=0;P0M0=0; #define D_HighI_P0_ALL() P0M1=0;P0M0=0XFF; #define D_HighR_P0_ALL() P0M1=0XFF;P0M0=0; #define D_OpenD_P0_ALL() P0M1=0XFF;P0M0=0XFF; #define D_stdIO_P1_ALL() P1M1=0;P1M0=0; #define D_HighI_P1_ALL() P1M1=0;P1M0=0XFF; #define D_HighR_P1_ALL() P1M1=0XFF;P1M0=0; #define D_OpenD_P1_ALL() P1M1=0XFF;P1M0=0XFF; #define D_stdIO_P0(n) BITN_0(P0M1,n);BITN_0(P0M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS #define D_HighI_P0(n) BITN_0(P0M1,n);BITN_1(P0M0,n); //////01 推挽输出 20mA 加限流 #define D_HighR_P0(n) BITN_1(P0M1,n);BITN_0(P0M0,n); /////////10 高阻 #define D_OpenD_P0(n) BITN_1(P0M1,n);BITN_1(P0M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 #define D_stdIO_P1(n) BITN_0(P1M1,n);BITN_0(P1M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS #define D_HighI_P1(n) BITN_0(P1M1,n);BITN_1(P1M0,n); //////01 推挽输出 20mA 加限流 #define D_HighR_P1(n) BITN_1(P1M1,n);BITN_0(P1M0,n); /////////10 高阻 #define D_OpenD_P1(n) BITN_1(P1M1,n);BITN_1(P1M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 #define D_stdIO_P2(n) BITN_0(P2M1,n);BITN_0(P2M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS #define D_HighI_P2(n) BITN_0(P2M1,n);BITN_1(P2M0,n); //////01 推挽输出 20mA 加限流 #define D_HighR_P2(n) BITN_1(P2M1,n);BITN_0(P2M0,n); /////////10 高阻 #define D_OpenD_P2(n) BITN_1(P2M1,n);BITN_1(P2M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 #define D_stdIO_P3(n) BITN_0(P3M1,n);BITN_0(P3M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS #define D_HighI_P3(n) BITN_0(P3M1,n);BITN_1(P3M0,n); //////01 推挽输出 20mA 加限流 #define D_HighR_P3(n) BITN_1(P3M1,n);BITN_0(P3M0,n); /////////10 高阻 #define D_OpenD_P3(n) BITN_1(P3M1,n);BITN_1(P3M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 #define D_stdIO_P4(n) BITN_0(P4M1,n);BITN_0(P4M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS #define D_HighI_P4(n) BITN_0(P4M1,n);BITN_1(P4M0,n); //////01 推挽输出 20mA 加限流 #define D_HighR_P4(n) BITN_1(P4M1,n);BITN_0(P4M0,n); /////////10 高阻 #define D_OpenD_P4(n) BITN_1(P4M1,n);BITN_1(P4M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 #define D_stdIO_P5(n) BITN_0(P5M1,n);BITN_0(P5M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS #define D_HighI_P5(n) BITN_0(P5M1,n);BITN_1(P5M0,n); //////01 推挽输出 20mA 加限流 #define D_HighR_P5(n) BITN_1(P5M1,n);BITN_0(P5M0,n); /////////10 高阻 #define D_OpenD_P5(n) BITN_1(P5M1,n);BITN_1(P5M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 #define D_stdIO_P6(n) BITN_0(P6M1,n);BITN_0(P6M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS #define D_HighI_P6(n) BITN_0(P6M1,n);BITN_1(P6M0,n); //////01 推挽输出 20mA 加限流 #define D_HighR_P6(n) BITN_1(P6M1,n);BITN_0(P6M0,n); /////////10 高阻 #define D_OpenD_P6(n) BITN_1(P6M1,n);BITN_1(P6M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 #define D_stdIO_P7(n) BITN_0(P7M1,n);BITN_0(P7M0,n); //////00 准双向口 灌电流20mA 拉电流270-150uS #define D_HighI_P7(n) BITN_0(P7M1,n);BITN_1(P7M0,n); //////01 推挽输出 20mA 加限流 #define D_HighR_P7(n) BITN_1(P7M1,n);BITN_0(P7M0,n); /////////10 高阻 #define D_OpenD_P7(n) BITN_1(P7M1,n);BITN_1(P7M0,n); /////11 开漏 open-Drain 内部上拉电阻断开 开漏模式既可以度外部状态也可以对外输出高低电平 /*** #define P0_conf_in(n) BITN_1(P0M1,n);BITN_0(P0M0,n); #define P1_conf_in(n) BITN_1(P1M1,n);BITN_0(P1M0,n); #define P2_conf_in(n) BITN_1(P2M1,n);BITN_0(P2M0,n); #define P2_conf_port(n) BITN_0(P2M1,n);BITN_0(P2M0,n); #define P3_conf_in(n) BITN_1(P3M1,n);BITN_0(P3M0,n); #define P3_conf_port(n) BITN_0(P3M1,n);BITN_0(P3M0,n); #define P4_conf_in(n) BITN_1(P4M1,n);BITN_0(P4M0,n); #define P5_conf_in(n) BITN_1(P5M1,n);BITN_0(P5M0,n); ***/ #define NOP() _nop_() #define L0_INT4_OPEN() BITN_1(INT_CLKO, INT_EX4) #define L0_INT4_CLOSE() BITN_0(INT_CLKO, INT_EX4) #define L0_INT4_AT() BITN_G(INT_CLKO, INT_EX4) #define L0_INT4_CLEAR() BITN_0(AUXINTIF, INT4IF) #define L0_INT3_CLEAR() BITN_0(AUXINTIF, INT3IF) #define L0_INT2_CLEAR() BITN_0(AUXINTIF, INT2IF) ////// #define L0_INT3_OPEN() BITN_1(INT_CLKO, INT_EX3); #define L0_INT3_CLOSE() BITN_0(INT_CLKO, INT_EX3); #define L0_INT2_OPEN() BITN_1(INT_CLKO, INT_EX2); #define L0_INT2_CLOSE() BITN_0(INT_CLKO, INT_EX2); #define L0_INT1_OPEN() EX1 = 1; #define L0_INT1_CLOSE() EX1 = 0; #define L0_INT0_OPEN() EX0 = 1; #define L0_INT0_CLOSE() EX0 = 0; #define D_ISR_int0 0 ///int0 下降沿触发 = 0 上下沿均可触发 #define D_ISR_timer0 1 #define D_ISR_int1 2 ///int1 下降沿触发 = 0 上下沿均可触发 #define D_ISR_timer1 3 #define D_ISR_int2 10 /////只有下降沿 #define D_ISR_int3 11 /////只有下降沿 #define D_SERVE_UART 4 #define D_SERVE_UART1 8 #define D_ISR_int4 16 /////只有下降沿 #if 0 #define L0_TIMER1_start() TR1 = 1; #define L0_TIMER1_end() TR1 = 0; #define L0_TIMER1_isr_OPEN() ET1 = 1; #define L0_TIMER1_isr_CLOSE() ET1 = 0; #else #define L0_TIMER1_start() ET1 = 1; #define L0_TIMER1_end() ET1 = 0; #define L0_TIMER1_isr_OPEN() TR1 = 1; #define L0_TIMER1_isr_CLOSE() TR1 = 0; #endif /// fixme 颠倒定义会让c51锁死#define _nop_() NOP() ///#define L0_INT3_OPEN() BITN_1(INT_CLKO,INT_EX3); //使能INT3中断 ///#define L0_INT3_CLOSE() BITN_0(INT_CLKO,INT_EX3); #endif #endif //STC_stc8a8k